=> 0xaffa0ece:	ldr	r3, [r5, #0]
   0xaffa0ed0:	ldr	r1, [sp, #4]
   0xaffa0ed2:	ldr	r3, [r3, #44]	; 0x2c
   0xaffa0ed4:	blx	r3
   0xaffa0ed6:	mvn.w	r1, #3
   0xaffa0eda:	mov	r7, r0
   0xaffa0edc:	bl	0xaff9abbc <_ZN6lucene5store11IndexOutput8writeIntEi>
   0xaffa0ee0:	ldrd	r2, r3, [r4, #16]
   0xaffa0ee4:	mov	r0, r7
   0xaffa0ee6:	adds	r2, #1
   0xaffa0ee8:	adc.w	r3, r3, #0
   0xaffa0eec:	strd	r2, r3, [r4, #16]
   0xaffa0ef0:	bl	0xaff9ac16 <_ZN6lucene5store11IndexOutput9writeLongEx>
   0xaffa0ef4:	mov	r0, r7
   0xaffa0ef6:	ldr	r1, [r4, #8]
   0xaffa0ef8:	bl	0xaff9abbc <_ZN6lucene5store11IndexOutput8writeIntEi>