I have installed the qemu-kvm packages from:
Description: Ubuntu 12.04.2 LTS
Release: 12.04
The installed versions are:
ii kvm 1:84+dfsg-0ubuntu16+1.0+noroms+0ubuntu14.7 dummy transitional package from kvm to qemu-kvm
ii qemu-kvm 1.0+noroms-0ubuntu14.7 Full virtualization on i386 and amd64 hardware
I'm running Ubuntu 12.04.2 LTS on the host machine as well as on the guest machine. I'm using the gcc package 4:4.6.3-1ubuntu5 for compiling the source code below.
If I compile this code using -O2 -march=native as options on the virtual guest machine, this results in a SIGILL:
#include <stdio.h>
#include <string.h>
int main(void) {
char testchar[20] = "abcde";
printf("%d\n",(int) strlen(testchar));
return 0;
}
Debugging shows that the illegal instruction is:
andn %eax, %ecx, %eax
The basic problem is that the virtual CPU does not support the andn instruction. Nevertheless it says so. Executing this assembly code will tell that the CPU does support the andn instraction although in reality it doesn't:
movl $7, %eax
movl $0, %ecx
cpuid
This means that code compiled with gcc -march=native potentially does not run as it should, as soon as gcc uses the andn instruction.
The CPU on the host system is:
processor : 0
vendor_id : AuthenticAMD
cpu family : 16
model : 9
model name : AMD Opteron(tm) Processor 6172
stepping : 1
microcode : 0x10000d9
cpu MHz : 800.000
cache size : 512 KB
physical id : 0
siblings : 12
core id : 0
cpu cores : 12
apicid : 16
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 5
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nopl nonstop_tsc extd_apicid amd_dcm pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt nodeid_msr npt lbrv svm_lock nrip_save pausefilter
bogomips : 4200.11
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate
The CPU shown in the virtual machine is:
processor : 0
vendor_id : AuthenticAMD
cpu family : 6
model : 2
model name : QEMU Virtual CPU version 1.0
stepping : 3
microcode : 0x1000065
cpu MHz : 2100.000
cache size : 512 KB
fpu : yes
fpu_exception : yes
cpuid level : 4
wp : yes
flags : fpu de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx lm nopl pni cx16 popcnt hypervisor lahf_lm svm abm sse4a
bogomips : 4200.00
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
Thanks for reporting this bug. Do you know if you can still reproduce this with either quantal or raring, or on an intel box with precise?