[ 19.486062] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) [ 19.486068] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 19.486074] cfg80211: (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) [ 19.486080] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) [ 19.486086] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 19.486092] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) [ 19.513844] ath5k 0000:02:00.0: enabling device (0000 -> 0002) [ 19.513859] ath5k 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 19.513877] ath5k 0000:02:00.0: setting latency timer to 64 [ 19.513979] ath5k 0000:02:00.0: registered as 'phy0' [ 19.687171] HDA Intel 0000:00:14.2: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 19.687278] HDA Intel 0000:00:14.2: irq 41 for MSI/MSI-X [ 19.831460] [drm] radeon defaulting to kernel modesetting. [ 19.831467] [drm] radeon kernel modesetting enabled. [ 19.831591] radeon 0000:01:05.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17 [ 19.848757] [drm] initializing kernel modesetting (RS400 0x1002:0x5A62). [ 19.848796] [drm] register mmio base: 0xC0100000 [ 19.848799] [drm] register mmio size: 65536 [ 19.848978] [drm] Generation 2 PCI interface, using max accessible memory [ 19.848987] radeon 0000:01:05.0: VRAM: 256M 0x0000000070000000 - 0x000000007FFFFFFF (256M used) [ 19.848992] radeon 0000:01:05.0: GTT: 512M 0x0000000080000000 - 0x000000009FFFFFFF [ 19.849008] [drm] Supports vblank timestamp caching Rev 1 (10.10.2010). [ 19.849011] [drm] Driver supports precise vblank timestamp query. [ 19.849057] [drm] radeon: irq initialized. [ 19.980096] hda_codec: ALC861-VD: BIOS auto-probing. [ 19.980836] [drm] Detected VRAM RAM=256M, BAR=256M [ 19.980839] [drm] RAM width 128bits DDR [ 20.005328] [TTM] Zone kernel: Available graphics memory: 437978 kiB. [ 20.005334] [TTM] Zone highmem: Available graphics memory: 900126 kiB. [ 20.005337] [TTM] Initializing pool allocator. [ 20.005378] [drm] radeon: 256M of VRAM memory ready [ 20.005381] [drm] radeon: 512M of GTT memory ready. [ 20.005427] [drm] GART: num cpu pages 131072, num gpu pages 131072 [ 20.024191] ath: EEPROM regdomain: 0x30 [ 20.024199] ath: EEPROM indicates we should expect a direct regpair map [ 20.024204] ath: Country alpha2 being used: AM [ 20.024206] ath: Regpair used: 0x30 [ 20.024214] cfg80211: Updating information on frequency 2412 MHz for a 20 MHz width channel with regulatory rule: [ 20.024218] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024222] cfg80211: Updating information on frequency 2417 MHz for a 20 MHz width channel with regulatory rule: [ 20.024226] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024229] cfg80211: Updating information on frequency 2422 MHz for a 20 MHz width channel with regulatory rule: [ 20.024233] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024236] cfg80211: Updating information on frequency 2427 MHz for a 20 MHz width channel with regulatory rule: [ 20.024240] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024243] cfg80211: Updating information on frequency 2432 MHz for a 20 MHz width channel with regulatory rule: [ 20.024246] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024263] cfg80211: Updating information on frequency 2437 MHz for a 20 MHz width channel with regulatory rule: [ 20.024267] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024270] cfg80211: Updating information on frequency 2442 MHz for a 20 MHz width channel with regulatory rule: [ 20.024274] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024277] cfg80211: Updating information on frequency 2447 MHz for a 20 MHz width channel with regulatory rule: [ 20.024280] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024284] cfg80211: Updating information on frequency 2452 MHz for a 20 MHz width channel with regulatory rule: [ 20.024287] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024291] cfg80211: Updating information on frequency 2457 MHz for a 20 MHz width channel with regulatory rule: [ 20.024294] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024298] cfg80211: Updating information on frequency 2462 MHz for a 20 MHz width channel with regulatory rule: [ 20.024301] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.024305] cfg80211: Disabling freq 2467 MHz as custom regd has no rule that fits a 20 MHz wide channel [ 20.024308] cfg80211: Disabling freq 2472 MHz as custom regd has no rule that fits a 20 MHz wide channel [ 20.024312] cfg80211: Disabling freq 2484 MHz as custom regd has no rule that fits a 20 MHz wide channel [ 20.024613] cfg80211: Updating information on frequency 2412 MHz for a 20 MHz width channel with regulatory rule: [ 20.024618] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024621] cfg80211: Updating information on frequency 2417 MHz for a 20 MHz width channel with regulatory rule: [ 20.024625] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024628] cfg80211: Updating information on frequency 2422 MHz for a 20 MHz width channel with regulatory rule: [ 20.024632] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024636] cfg80211: Updating information on frequency 2427 MHz for a 20 MHz width channel with regulatory rule: [ 20.024639] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024643] cfg80211: Updating information on frequency 2432 MHz for a 20 MHz width channel with regulatory rule: [ 20.024647] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024650] cfg80211: Updating information on frequency 2437 MHz for a 20 MHz width channel with regulatory rule: [ 20.024654] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024657] cfg80211: Updating information on frequency 2442 MHz for a 20 MHz width channel with regulatory rule: [ 20.024661] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024664] cfg80211: Updating information on frequency 2447 MHz for a 20 MHz width channel with regulatory rule: [ 20.024668] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024671] cfg80211: Updating information on frequency 2452 MHz for a 20 MHz width channel with regulatory rule: [ 20.024675] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024678] cfg80211: Updating information on frequency 2457 MHz for a 20 MHz width channel with regulatory rule: [ 20.024682] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024685] cfg80211: Updating information on frequency 2462 MHz for a 20 MHz width channel with regulatory rule: [ 20.024689] cfg80211: 2402000 KHz - 2472000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024693] cfg80211: Updating information on frequency 2467 MHz for a 20 MHz width channel with regulatory rule: [ 20.024696] cfg80211: 2457000 KHz - 2482000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024700] cfg80211: Updating information on frequency 2472 MHz for a 20 MHz width channel with regulatory rule: [ 20.024704] cfg80211: 2457000 KHz - 2482000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.024707] cfg80211: Updating information on frequency 2484 MHz for a 20 MHz width channel with regulatory rule: [ 20.024711] cfg80211: 2474000 KHz - 2494000 KHz @ KHz), (300 mBi, 2000 mBm) [ 20.030378] [drm] radeon: 3 quad pipes, 1 z pipes initialized. [ 20.039708] radeon 0000:01:05.0: WB enabled [ 20.041754] [drm] Loading R300 Microcode [ 20.047621] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht' [ 20.050208] cfg80211: Calling CRDA for country: AM [ 20.051204] Registered led device: ath5k-phy0::rx [ 20.051255] Registered led device: ath5k-phy0::tx [ 20.051270] ath5k phy0: Atheros AR2425 chip found (MAC: 0xe2, PHY: 0x70) [ 20.062657] [drm] radeon: ring at 0x0000000080001000 [ 20.062688] [drm] ring test succeeded in 1 usecs [ 20.062881] [drm] radeon: ib pool ready. [ 20.062991] [drm] ib test succeeded in 0 usecs [ 20.069391] Synaptics Touchpad, model: 1, fw: 6.2, id: 0x1280b1, caps: 0xa04713/0x204000/0x0 [ 20.071079] [drm] Panel ID String: CPT [ 20.071084] [drm] Panel Size 1280x800 [ 20.071481] cfg80211: Updating information on frequency 2412 MHz for a 20 MHz width channel with regulatory rule: [ 20.071486] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071490] cfg80211: Updating information on frequency 2417 MHz for a 20 MHz width channel with regulatory rule: [ 20.071494] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071497] cfg80211: Updating information on frequency 2422 MHz for a 20 MHz width channel with regulatory rule: [ 20.071501] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071505] cfg80211: Updating information on frequency 2427 MHz for a 20 MHz width channel with regulatory rule: [ 20.071508] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071512] cfg80211: Updating information on frequency 2432 MHz for a 20 MHz width channel with regulatory rule: [ 20.071515] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071519] cfg80211: Updating information on frequency 2437 MHz for a 20 MHz width channel with regulatory rule: [ 20.071522] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071526] cfg80211: Updating information on frequency 2442 MHz for a 20 MHz width channel with regulatory rule: [ 20.071530] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071533] cfg80211: Updating information on frequency 2447 MHz for a 20 MHz width channel with regulatory rule: [ 20.071537] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071540] cfg80211: Updating information on frequency 2452 MHz for a 20 MHz width channel with regulatory rule: [ 20.071544] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071547] cfg80211: Updating information on frequency 2457 MHz for a 20 MHz width channel with regulatory rule: [ 20.071551] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071554] cfg80211: Updating information on frequency 2462 MHz for a 20 MHz width channel with regulatory rule: [ 20.071558] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071562] cfg80211: Updating information on frequency 2467 MHz for a 20 MHz width channel with regulatory rule: [ 20.071565] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071569] cfg80211: Updating information on frequency 2472 MHz for a 20 MHz width channel with regulatory rule: [ 20.071572] cfg80211: 2402000 KHz - 2482000 KHz @ KHz), (N/A mBi, 2000 mBm) [ 20.071575] cfg80211: Disabling freq 2484 MHz [ 20.071581] cfg80211: Regulatory domain changed to country: AM [ 20.071584] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) [ 20.071588] cfg80211: (2402000 KHz - 2482000 KHz @ 40000 KHz), (N/A, 2000 mBm) [ 20.071591] cfg80211: (5170000 KHz - 5250000 KHz @ 20000 KHz), (N/A, 1800 mBm) [ 20.071595] cfg80211: (5250000 KHz - 5330000 KHz @ 20000 KHz), (N/A, 1800 mBm) [ 20.073004] [drm] Radeon Display Connectors [ 20.073009] [drm] Connector 0: [ 20.073012] [drm] VGA [ 20.073015] [drm] DDC: 0x68 0x68 0x68 0x68 0x68 0x68 0x68 0x68 [ 20.073018] [drm] Encoders: [ 20.073020] [drm] CRT1: INTERNAL_DAC2 [ 20.073023] [drm] Connector 1: [ 20.073025] [drm] LVDS [ 20.073028] [drm] DDC: 0x198 0x198 0x19c 0x19c 0x1a0 0x1a0 0x1a4 0x1a4 [ 20.073031] [drm] Encoders: [ 20.073033] [drm] LCD1: INTERNAL_LVDS [ 20.073035] [drm] Connector 2: [ 20.073037] [drm] S-video [ 20.073039] [drm] Encoders: [ 20.073041] [drm] TV1: INTERNAL_DAC2 [ 20.219427] [drm] fb mappable at 0xD0040000 [ 20.219434] [drm] vram apper at 0xD0000000 [ 20.219436] [drm] size 4096000 [ 20.219438] [drm] fb depth is 24 [ 20.219440] [drm] pitch is 5120 [ 20.222412] Console: switching to colour frame buffer device 160x50 [ 20.222546] fb0: radeondrmfb frame buffer device [ 20.222549] drm: registered panic notifier [ 20.222609] [drm] Initialized radeon 2.8.0 20080528 for 0000:01:05.0 on minor 0 [ 20.245029] input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio4/input/input6 [ 20.518529] ppdev: user-space parallel port driver [ 21.166993] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro,commit=0 [ 21.469410] ADDRCONF(NETDEV_UP): wlan0: link is not ready [ 22.450143] cfg80211: Found new beacon on frequency: 2472 MHz (Ch 13) on phy0 [ 23.867213] wlan0: authenticate with 00:24:01:d1:1e:c0 (try 1) [ 23.868879] wlan0: authenticated [ 23.868955] wlan0: associate with 00:24:01:d1:1e:c0 (try 1) [ 23.876163] wlan0: RX AssocResp from 00:24:01:d1:1e:c0 (capab=0x431 status=0 aid=2) [ 23.876172] wlan0: associated [ 23.877077] ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready [ 23.977778] Intel AES-NI instructions are not detected. [ 24.085759] padlock_aes: VIA PadLock not detected. [ 25.600131] EXT4-fs (sda2): re-mounted. Opts: errors=remount-ro,commit=0 [ 34.448028] wlan0: no IPv6 routers present [ 113.081028] exe (1667): /proc/1667/oom_adj is deprecated, please use /proc/1667/oom_score_adj instead.