[Feature] Include support for Intel Bordenville chipset (i2c (SMBUS), Watchdog timer and PCI IDS)
Bug #1011449 reported by
Yingying Zhao
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
intel |
Fix Released
|
Medium
|
Chris Van Hoof | ||
linux (Ubuntu) |
Fix Released
|
Medium
|
Leann Ogasawara | ||
Raring |
Fix Released
|
Medium
|
Leann Ogasawara |
Bug Description
The Bordenville platform uses the Centerton SOC which includes 2 Atom Core, with some uncore devices (Watch Dog timer, GPIO, Legacy SMBUS, SMBUS 2.0).
he Centerton Chipset will need three patches:
- mfd.c to enable Watchdog Timer and GPIO,
- Chipset Branding PCIIDS,
- SMBUS(2) driver i2c_sch.c.
Upstream Schedule:
MFD and PCIIDS patches are in kernel 3.5 now;
SMBUS2.0 Beta WW25'12
SMBUS2.0 PV WW26'12
Related branches
CVE References
Changed in intel: | |
assignee: | nobody → Chris Van Hoof (vanhoof) |
status: | New → Confirmed |
importance: | Undecided → Medium |
Changed in intel: | |
status: | Fix Committed → Fix Released |
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At a minimum, we are targeting the v3.5 kernel (possibly v3.6) for the Quantal 12.10 release. Given the information provided in the bug description, we should be on track to satisfy this requirement. We'll continue to track this through the release cycle.