This bug was fixed in the package linux-riscv - 6.8.0-20.20.1 --------------- linux-riscv (6.8.0-20.20.1) noble; urgency=medium * noble/linux-riscv: 6.8.0-20.20.1 -proposed tracker (LP: #2058921) * Packaging resync (LP: #1786013) - debian.riscv/dkms-versions -- update from kernel-versions (main/d2024.02.29) * Enable StarFive VisionFive 2 board (LP: #2013232) - dt-bindings: pwm: Add bindings for OpenCores PWM Controller - riscv: dts: starfive: jh7110: Add PWM node and pins configuration - SAUCE: pwm: opencores: Add PWM driver support - SAUCE: dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties - SAUCE: PCI: microchip: Move pcie-microchip-host.c to plda directory - SAUCE: PCI: microchip: Move PLDA IP register macros to pcie-plda.h - SAUCE: PCI: microchip: Add bridge_addr field to struct mc_pcie - SAUCE: PCI: microchip: Rename two PCIe data structures - SAUCE: PCI: microchip: Move PCIe host data structures to plda-pcie.h - SAUCE: PCI: microchip: Rename two setup functions - SAUCE: PCI: microchip: Change the argument of plda_pcie_setup_iomems() - SAUCE: PCI: microchip: Move setup functions to pcie-plda-host.c - SAUCE: PCI: microchip: Rename interrupt related functions - SAUCE: PCI: microchip: Add num_events field to struct plda_pcie_rp - SAUCE: PCI: microchip: Add request_event_irq() callback function - SAUCE: PCI: microchip: Add INTx and MSI event num to struct plda_event - SAUCE: PCI: microchip: Add get_events() callback and add PLDA get_event() - SAUCE: PCI: microchip: Add event irqchip field to host port and add PLDA irqchip - SAUCE: PCI: microchip: Move IRQ functions to pcie-plda-host.c - SAUCE: PCI: plda: Add event bitmap field to struct plda_pcie_rp - SAUCE: PCI: plda: Add host init/deinit and map bus functions - SAUCE: dt-bindings: PCI: Add StarFive JH7110 PCIe controller - SAUCE: PCI: Add PCIE_RESET_CONFIG_DEVICE_WAIT_MS waiting time value - SAUCE: PCI: starfive: Add JH7110 PCIe controller - SAUCE: PCI: starfive: Offload the NVMe timeout workaround to host drivers. - SAUCE: riscv: dts: starfive: add PCIe dts configuration for JH7110 - SAUCE: clk: starfive: jh7110-sys: Fix lower rate of CPUfreq by setting PLL0 rate to 1.5GHz - SAUCE: [HACK] riscv: dts: starfive: Add VisionFive 2 reserved memory node - SAUCE: riscv: dts: starfive: Disable JH7110 crypto peripheral - [Config] riscv: updateconfigs for VisionFive 2 patches * Enable Nezha board (LP: #1975592) - [Config] Enable CONFIG_REGULATOR_FIXED_VOLTAGE on riscv64 - SAUCE: dt-bindings: pwm: Add binding for Allwinner D1/T113-S3/R329 PWM controller - SAUCE: pwm: Add Allwinner's D1/T113-S3/R329 SoCs PWM support - SAUCE: riscv: dts: allwinner: d1: Add pwm node - SAUCE: riscv: dts: allwinner: d1: Add PWM pins - SAUCE: mmc: sunxi-mmc: Correct the maximum segment size - SAUCE: riscv: dts: allwinner: d1: Add misc nodes - SAUCE: riscv: dts: allwinner: Keep aldo regulator on - SAUCE: riscv: dts: allwinner: Add button on the Nezha board - SAUCE: riscv: dts: allwinner: Add button on the Lichee RV Dock - SAUCE: dt-bindings: nvmem: Allow bit offsets greater than a byte - SAUCE: nvmem: core: Support reading cells with >= 8 bit offsets - SAUCE: regulator: dt-bindings: Add Allwinner D1 LDOs - SAUCE: regulator: sun20i: Add support for Allwinner D1 LDOs - SAUCE: regulator: sun20i: Use device_node_to_regmap() - SAUCE: dt-bindings: sram: sunxi-sram: Add optional regulators child - SAUCE: dt-bindings: thermal: sun8i: Add compatible for D1 - SAUCE: thermal: sun8i: Document the unknown field - SAUCE: thermal: sun8i: Set the event type for new samples - SAUCE: thermal: sun8i: Ensure vref is powered - SAUCE: riscv: dts: allwinner: d1: Add thermal sensor and zone - SAUCE: riscv: dts: allwinner: d1: Hook up PWM-controlled CPU voltage regulators - SAUCE: drm/sun4i: dsi: Allow panel attach before card registration - SAUCE: drm/sun4i: mixer: Remove unused CMA headers - SAUCE: drm/sun4i: tcon: Always protect the LCD dotclock rate - SAUCE: drm/sun4i: tcon_top: Register reset, clock gates in probe - SAUCE: riscv: dts: allwinner: lichee-rv-86-panel-480p: Add panel - SAUCE: riscv: dts: allwinner: d1: Add HDMI pipeline - SAUCE: riscv: dts: allwinner: d1: Enable HDMI on supported boards - SAUCE: dt-bindings: display: sun4i-tcon: Add external LVDS PHY - SAUCE: riscv: dts: allwinner: d1: Add LVDS0 PHY - SAUCE: riscv: dts: allwinner: d1: Add LED controller node - SAUCE: riscv: dts: allwinner: d1: Add RGB LEDs to boards - SAUCE: ASoC: sun20i-codec: New driver for D1 internal codec - SAUCE: [WIP] ASoC: sun20i-codec: What is this ramp thing? - SAUCE: riscv: dts: allwinner: d1: Add sound cards to boards - SAUCE: dt-bindings: display: sun8i-a83t-dw-hdmi: Remove #phy-cells - SAUCE: dt-bindings: display: Add D1 HDMI compatibles - SAUCE: drm/sun4i: Add support for D1 HDMI - SAUCE: drm/sun4i: sun8i-hdmi-phy: Add support for D1 PHY - SAUCE: [HACK] drm/sun4i: Copy in BSP code for D1 HDMI PHY - SAUCE: riscv: dts: allwinner: Add Nezha and Lichee RV SPI nodes - SAUCE: dt-bindings: display: Add Sitronix ST7701s panel binding - SAUCE: drm/panel: Add driver for ST7701s DPI LCD panel - [Config] riscv: updateconfigs for D1 patches * Excessive size of kernel modules on RISC-V - modules unstripped (LP: #1964335) - SAUCE: scripts/Makefile.modinst discard-locals from modules * Enable Nezha board (LP: #1975592) // Enable StarFive VisionFive 2 board (LP: #2013232) - [Config] Enable CONFIG_SERIAL_8250_DW on riscv64 * RISC-V kernel config is out of sync with other archs (LP: #1981437) - [Config] Sync riscv64 config with other architectures * Miscellaneous Ubuntu changes - [Config] Disable StarFive JH7100 support - [Config] Disable Renesas RZ/Five support - [Config] Disable BINFMT_FLAT for riscv64 - [Config] Enable dead code elimination in the riscv64 linker - [Packaging] Create linux-riscv sameport -- Emil Renner Berthing