isa-support 23 source package in Ubuntu

Changelog

isa-support (23) unstable; urgency=medium

  * Upload to unstable
  * Rebuild from source (Closes: #1029792)
  * Bug fix: "[INTL:sv] Swedish strings for isa-support debconf", thanks
    to Martin Bagge (Closes: #1071730).

 -- Bastien Roucariès <email address hidden>  Wed, 26 Jun 2024 06:01:56 +0000

Upload details

Uploaded by:
broucaries
Uploaded to:
Sid
Original maintainer:
broucaries
Architectures:
any-i386 any-amd64 armel armhf powerpc
Section:
misc
Urgency:
Medium Urgency

See full publishing history Publishing

Series Pocket Published Component Section

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File Size SHA-256 Checksum
isa-support_23.dsc 2.7 KiB 474e2daef4796af5250f2027ab6b180fd05b47806b79d359121285b3a9b9f764
isa-support_23.tar.xz 15.8 KiB d0bf61b2a3660b2c721e806f8e156c48f54ae170dc4da3d278fdc53efe708dcf

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Binary packages built by this source

amd64-baseline-support: CPU feature checking - require amd64-baseline

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for amd64-baseline and
 refuses to install on unsupported hardware.
 .
 This is the Micro-Architecture Levels baseline for Debian under
 x86-64 architecture, corresponding to x86-65 psABI v1.
 .
 This includes:
 - cmov instruction (CMOV instruction set),
 - cmpxchg8b ant other 64 bits atomics instruction (CX8 instruction set),
 - MMX a single instruction, multiple data (SIMD) instruction set,
 - streaming SIMD Extensions (SSE) set, a single instruction, multiple data
   (SIMD) instruction set extension,
 - SSE2 an incremental upgrade to SSE.
 .
 On ABIs other than the x86-64 psABI they select the same CPU features
 as the x86-64 psABI documents for the particular micro-architecture level.

armv8-support: CPU feature checking - require ARMv8

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for ARMv8 and
 refuses to install on unsupported hardware.
 .
 ARMv8 (not to be confused with product family ARM8) introduced a large
 number of ISA enhancements. It is not guaranteed by the architecture
 baseline, but is available for newer armel machines (including CPUs that
 support armhf) since the Cortex-A product family, including Cortex-A32, as
 well as all arm64 processors. Boards include the Raspberry Pi 3 and 4.

isa-support: CPU feature checking - common back-end

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This package provides the feature-probing infrastructure. To assert a CPU
 requirement, other packages can pre-depend on one of the individual
 feature-specific packages:
 .
 sse2-support, sse3-support, sse4.2-support, altivec-support, neon-support,
 armv6-support, armv7-support, armv8-support, vfp-support, vfpv2-support,
 vfpv3-support

isa-support-dbgsym: debug symbols for isa-support
neon-support: CPU feature checking - require neon

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for neon and
 refuses to install on unsupported hardware.
 .
 This is a mostly dummy package which checks for Neon and refuses to install
 on unsupported hardware.
 .
 Neon, also known as MPE (Media Processing Engine) or Advanced SIMD, is a
 combined 64- and 128-bit SIMD instruction set that provides standardised
 acceleration for media and signal processing applications. It is available
 on the vast majority of armhf devices but not guaranteed before the 64-bit
 capable ARMv8.

sse2-support: CPU feature checking - require SSE2

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for SSE2 and
 refuses to install on unsupported hardware.
 .
 Streaming SIMD Extensions (SSE) is a single instruction, multiple data
 (SIMD) instruction set extension.
 .
 SSE2 was an incremental upgrade to SSE intended to fully replace the earlier
 MMX instruction set. It is available on processors from Pentium 4 onward,
 including all 64-bit capable ones, but not on Pentium 3, Athlon XP, Via C3,
 Quark, or older processors.

sse3-support: CPU feature checking - require SSE3

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for SSE3 and
 refuses to install on unsupported hardware.
 .
 Streaming SIMD Extensions (SSE) is a single instruction, multiple data
 (SIMD) instruction set extension.
 .
 SSE3, also called PNI (Prescott New Instructions), is an incremental upgrade
 to SSE2, adding a handful of new operations useful for processing media. It
 is available on almost any 64-bit-capable processor except for some early
 AMD models (Sledgehammer and Clawhammer), but is not available on most
 32-bit-only hardware.

sse4.1-support: CPU feature checking - require SSE4.1

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for SSE4.1 and
 refuses to install on unsupported hardware.
 .
 Streaming SIMD Extensions (SSE) is a single instruction, multiple data
 (SIMD) instruction set extension.
 .
 SSE4.1 added a dot product instruction and additional integer instructions.
 It is available on Intel processors since Penryn (circa 2008), but notably
 not on anything AMD until the Bulldozer (15h, in 2011) and Jaguar (16h, in
 2013) families.

sse4.2-support: CPU feature checking - require SSE4.2

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for SSE4.2 and
 refuses to install on unsupported hardware.
 .
 SSE4.2 added string and text processing instructions that perform character
 searches and comparison on two operands of 16 bytes at a time. It is
 available on Intel processors since Nehalem (circa 2008), but notably not
 on anything AMD until the Bulldozer (15h, in 2011) and Jaguar (16h, in
 2013) families.

x86-64-v2-support: CPU feature checking - require x86-64-v2

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for x86-64-v2 and
 refuses to install on unsupported hardware.
 .
 This is the Micro-Architecture Levels version 2 as defined by the
 amd64 ABI document.
 This includes:
 - cmov instruction (CMOV instruction set),
 - cmpxchg8b ant other 64 bits atomics instruction (CX8 instruction set),
 - MMX a single instruction, multiple data (SIMD) instruction set,
 - streaming SIMD Extensions (SSE) set, a single instruction, multiple data
   (SIMD) instruction set extension,
 - SSE2 an incremental upgrade to SSE.
 - cmpxchg16b ant other 128 bits atomics instruction (CX16 instruction set),
 - SSE3, also called PNI (Prescott New Instructions), is an incremental upgrade
   to SSE2
 - SSE4.1 added a dot product instruction and additional integer instructions.
 - SSE4.2 added string and text processing instructions that perform character
   searches and comparison on two operands of 16 bytes at a time.
 - SSSE3 or Supplemental Streaming SIMD Extension 3.
 .
 The corresponding micro-architecture level from the x86-64 psABI.
 On ABIs other than the x86-64 psABI they select the same CPU features
 as the x86-64 psABI documents for the particular micro-architecture level.

x86-64-v3-support: CPU feature checking - require x86-64-v3

 The packages in the isa-support family probe for microprocessor Instruction
 Set Architecture features such as SSE3. By refusing to install on machines
 lacking a required feature, they allow ISA requirements to be handled in
 terms of package dependencies.
 .
 This is a mostly dummy package which checks for x86-64-v3 and
 refuses to install on unsupported hardware.
 .
 This is the Micro-Architecture Levels version 3 as defined by
 the amd64 ABI document.
 This includes:
 - cmov instruction (CMOV instruction set),
 - cmpxchg8b ant other 64 bits atomics instruction (CX8 instruction set),
 - MMX a single instruction, multiple data (SIMD) instruction set,
 - streaming SIMD Extensions (SSE) set, a single instruction, multiple data
   (SIMD) instruction set extension,
 - SSE2 an incremental upgrade to SSE.
 - cmpxchg16b ant other 128 bits atomics instruction (CX16 instruction set),
 - SSE3, also called PNI (Prescott New Instructions), is an incremental upgrade
   to SSE2,
 - SSE4.1 added a dot product instruction and additional integer instructions,
 - SSE4.2 added string and text processing instructions that perform character
   searches and comparison on two operands of 16 bytes at a time,
 - SSSE3 or Supplemental Streaming SIMD Extension 3,
 - Advanced Vector Extensions (AVX and AVX2)
 - Bit manipulation instructions sets (BMI and BMI2),
 - F16C instruction set converting between half-precision
   and standard IEEE single-precision floating-point formats,
 - LZCNT instruction, Count the Number of Leading Zero Bits,
 - OSXSAVE, Save Processor Extended States instruction.
 .
 The corresponding micro-architecture level from the x86-64 psABI.
 On ABIs other than the x86-64 psABI they select the same CPU features
 as the x86-64 psABI documents for the particular micro-architecture level.