haskell-clash-lib 1.8.1-1build1 source package in Ubuntu
Changelog
haskell-clash-lib (1.8.1-1build1) noble; urgency=medium * Rebuild against 'new GHC ABI'. -- Gianfranco Costamagna <email address hidden> Mon, 18 Dec 2023 08:13:07 +0100
Upload details
- Uploaded by:
- Gianfranco Costamagna
- Uploaded to:
- Noble
- Original maintainer:
- Debian Haskell Group
- Architectures:
- any all
- Section:
- misc
- Urgency:
- Medium Urgency
See full publishing history Publishing
Series | Published | Component | Section | |
---|---|---|---|---|
Noble | release | universe | misc |
Downloads
File | Size | SHA-256 Checksum |
---|---|---|
haskell-clash-lib_1.8.1.orig.tar.gz | 477.6 KiB | c57bc82a2084f6cbb3f086d8319fa0ca53e5c5ede191ff8499bfd4df2e6861e8 |
haskell-clash-lib_1.8.1-1build1.debian.tar.xz | 4.1 KiB | 07fec22adcdd072fe2a796442789f9e14d6ea38c8b5c9b641979fc4ef6a3cd5d |
haskell-clash-lib_1.8.1-1build1.dsc | 6.8 KiB | 793544be1ed5ed9320e11c799c7ab994ee03b6cfbcea361dab436a70749ea164 |
Available diffs
- diff from 1.6.4-1 (in Debian) to 1.8.1-1build1 (159.6 KiB)
- diff from 1.8.1-1 (in Debian) to 1.8.1-1build1 (350 bytes)
Binary packages built by this source
- haskell-clash-lib-utils: Functional hardware description language - library
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
synthesizable VHDL, Verilog, or SystemVerilog.
.
Features of Clash:
.
* Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
.
* Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
.
* Higher-order functions, with type inference, result in designs that are
fully parametric by default.
.
* Synchronous sequential circuit design based on streams of values, called
@Signal@s, lead to natural descriptions of feedback loops.
.
* Support for multiple clock domains, with type safe clock domain crossing.
.
This package provides:
.
* The CoreHW internal language: SystemF + Letrec + Case-decomposition
.
* The normalisation process that brings CoreHW in a normal form that can be
converted to a netlist
.
* Blackbox/Primitive Handling
.
Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:
.
* <https://hackage. haskell. org/package/ clash-ghc GHC/Haskell Frontend>
.
* <https://github. com/christiaanb /Idris- dev Idris Frontend>
.
Prelude library: <https://hackage. haskell. org/package/ clash-prelude>
- libghc-clash-lib-dev: Functional hardware description language - library
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
synthesizable VHDL, Verilog, or SystemVerilog.
.
Features of Clash:
.
* Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
.
* Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
.
* Higher-order functions, with type inference, result in designs that are
fully parametric by default.
.
* Synchronous sequential circuit design based on streams of values, called
@Signal@s, lead to natural descriptions of feedback loops.
.
* Support for multiple clock domains, with type safe clock domain crossing.
.
This package provides:
.
* The CoreHW internal language: SystemF + Letrec + Case-decomposition
.
* The normalisation process that brings CoreHW in a normal form that can be
converted to a netlist
.
* Blackbox/Primitive Handling
.
Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:
.
* <https://hackage. haskell. org/package/ clash-ghc GHC/Haskell Frontend>
.
* <https://github. com/christiaanb /Idris- dev Idris Frontend>
.
Prelude library: <https://hackage. haskell. org/package/ clash-prelude>
.
This package provides a library for the Haskell programming language.
See http://www.haskell. org/ for more information on Haskell.
- libghc-clash-lib-doc: Functional hardware description language - library; documentation
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
synthesizable VHDL, Verilog, or SystemVerilog.
.
Features of Clash:
.
* Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
.
* Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
.
* Higher-order functions, with type inference, result in designs that are
fully parametric by default.
.
* Synchronous sequential circuit design based on streams of values, called
@Signal@s, lead to natural descriptions of feedback loops.
.
* Support for multiple clock domains, with type safe clock domain crossing.
.
This package provides:
.
* The CoreHW internal language: SystemF + Letrec + Case-decomposition
.
* The normalisation process that brings CoreHW in a normal form that can be
converted to a netlist
.
* Blackbox/Primitive Handling
.
Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:
.
* <https://hackage. haskell. org/package/ clash-ghc GHC/Haskell Frontend>
.
* <https://github. com/christiaanb /Idris- dev Idris Frontend>
.
Prelude library: <https://hackage. haskell. org/package/ clash-prelude>
.
This package provides the documentation for a library for the Haskell
programming language.
See http://www.haskell. org/ for more information on Haskell.
- libghc-clash-lib-prof: Functional hardware description language - library; profiling libraries
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
synthesizable VHDL, Verilog, or SystemVerilog.
.
Features of Clash:
.
* Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
.
* Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
.
* Higher-order functions, with type inference, result in designs that are
fully parametric by default.
.
* Synchronous sequential circuit design based on streams of values, called
@Signal@s, lead to natural descriptions of feedback loops.
.
* Support for multiple clock domains, with type safe clock domain crossing.
.
This package provides:
.
* The CoreHW internal language: SystemF + Letrec + Case-decomposition
.
* The normalisation process that brings CoreHW in a normal form that can be
converted to a netlist
.
* Blackbox/Primitive Handling
.
Front-ends (for: parsing, typecheck, etc.) are provided by separate packages:
.
* <https://hackage. haskell. org/package/ clash-ghc GHC/Haskell Frontend>
.
* <https://github. com/christiaanb /Idris- dev Idris Frontend>
.
Prelude library: <https://hackage. haskell. org/package/ clash-prelude>
.
This package provides a library for the Haskell programming language, compiled
for profiling. See http://www.haskell. org/ for more information on Haskell.