diff -u geda-gnetlist-1.4.0/debian/changelog geda-gnetlist-1.4.0/debian/changelog --- geda-gnetlist-1.4.0/debian/changelog +++ geda-gnetlist-1.4.0/debian/changelog @@ -1,3 +1,13 @@ +geda-gnetlist (1:1.4.0-2ubuntu1) intrepid; urgency=low + + * debian/rules: Included dpatch + * debian/control: Added dpatch to the BuildDepends + * debian/patches: Added patches for fixing the vhdl and verilog + netlisting issue. Thanks to Peter Clifton. + * Closes (LP : #207760) + + -- Aanjhan Ranganathan Tue, 19 Aug 2008 12:22:15 +0530 + geda-gnetlist (1:1.4.0-2build2) intrepid; urgency=low * Rebuild against thread-enabled guile-1.8. diff -u geda-gnetlist-1.4.0/debian/control geda-gnetlist-1.4.0/debian/control --- geda-gnetlist-1.4.0/debian/control +++ geda-gnetlist-1.4.0/debian/control @@ -4,7 +4,7 @@ Maintainer: Debian Electronics Team Uploaders: Hamish Moffatt , Wesley J. Landaker Standards-Version: 3.7.3 -Build-Depends: libgeda-dev (>= 1:1.4.0), debhelper (>= 4), groff +Build-Depends: libgeda-dev (>= 1:1.4.0), debhelper (>= 4), groff, dpatch Homepage: http://geda.seul.org/ Package: geda-gnetlist diff -u geda-gnetlist-1.4.0/debian/rules geda-gnetlist-1.4.0/debian/rules --- geda-gnetlist-1.4.0/debian/rules +++ geda-gnetlist-1.4.0/debian/rules @@ -5,15 +5,16 @@ # Uncomment this to turn on verbose mode. #export DH_VERBOSE=1 +include /usr/share/dpatch/dpatch.make build: build-stamp -build-stamp: +build-stamp: patch-stamp dh_testdir ./configure --prefix=/usr --with-rcdir=/etc/gEDA make CFLAGS="-O2 -g -Wall" touch build-stamp -clean: +clean: unpatch dh_testdir rm -f build-stamp only in patch2: unchanged: --- geda-gnetlist-1.4.0.orig/debian/patches/01_fix_vhdl_verilog_netlisting.dpatch +++ geda-gnetlist-1.4.0/debian/patches/01_fix_vhdl_verilog_netlisting.dpatch @@ -0,0 +1,249 @@ +#! /bin/sh /usr/share/dpatch/dpatch-run +## 01_fix_vhdl_verilog_netlisting.dpatch by +## +## All lines beginning with `## DP:' are a description of the patch. +## DP: No description. + +@DPATCH@ +diff -urNad geda-gnetlist-1.4.0~/scheme/gnet-verilog.scm geda-gnetlist-1.4.0/scheme/gnet-verilog.scm +--- geda-gnetlist-1.4.0~/scheme/gnet-verilog.scm 2007-12-30 08:20:19.000000000 +0530 ++++ geda-gnetlist-1.4.0/scheme/gnet-verilog.scm 2008-08-19 12:14:32.000000000 +0530 +@@ -343,102 +343,110 @@ + ;; return a list of net description objects + ;; + +-(define the-nets '()) +- +-(define verilog:get-nets +- (begin +- (for-each +- (lambda (netname) +- ; parse the netname, and see if it is already on the list +- (let* ((parsed (verilog:net-parse netname)) +- (listed (assoc (car parsed) the-nets))) +- (if listed +- (begin ; it is, do some checks, and update the record +- ;; extract fields from list +- (let* ((list-name (car listed)) +- (list-n1 (car (cadr listed))) +- (list-n2 (cadr (cadr listed))) +- (list-increasing (caddr (cadr listed))) +- (list-sure (cadddr (cadr listed))) +- (list-real (cadddr (cdr (cadr listed)))) +- +- (name (car parsed)) +- (n1 (car (cadr parsed))) +- (n2 (cadr (cadr parsed))) +- (increasing (caddr (cadr parsed))) +- (sure (cadddr (cadr parsed))) +- (real (cadddr (cdr (cadr parsed)))) +- +- (consistant (or (and list-increasing increasing) +- (and (not list-increasing) +- (not increasing)))) +- +- ) +- +- (cond +- ((and list-sure consistant) +- (begin +- (set-cdr! listed +- (verilog:update-record n1 n2 +- list-n1 list-n2 +- increasing +- #t +- real) +- ))) +- ((and list-sure (not sure) (zero? n1) (zero? n2)) +- '() ;; this is a net without any expression, leave it +- ) +- ((and list-sure (not consistant)) +- (begin ;; order is inconsistent +- (display +- (string-append "Warning: Net `" real "' has a " +- "bit order that conflicts with " +- "the original definition of `" +- list-real "', ignoring `" +- real "'" +- )) +- (newline))) +- ((and (not list-sure) sure consistant) +- (begin +- (set-cdr! listed +- (verilog:update-record n1 n2 +- list-n1 list-n2 +- increasing +- #t +- real)))) +- +- ((and (not list-sure) sure (not consistant)) +- (begin +- (set-cdr! listed +- (verilog:update-record n1 n2 +- list-n2 list-n1 +- increasing +- #t +- real)))) +- ((and (not list-sure) (not sure)) +- (begin +- (set-cdr! listed +- (verilog:update-record n1 n2 +- list-n1 list-n2 +- increasing +- #f +- real)))) +- (else +- (begin +- (display "This should never happen!") +- (newline))) +- ) +- ) +- ) +- (begin ; it is not, just add it to the end +- (set! the-nets +- (append the-nets +- (list parsed)))) +- )) +- ) +- +- all-unique-nets) +- the-nets)) ++ ++(define verilog:get-nets '()) ++ ++ ++(define verilog:get-nets-once! ++ (lambda nil ++ (define the-nets '()) ++ (set! verilog:get-nets ++ (begin ++ (for-each ++ (lambda (netname) ++ ; parse the netname, and see if it is already on the list ++ (let* ((parsed (verilog:net-parse netname)) ++ (listed (assoc (car parsed) the-nets))) ++ (if listed ++ (begin ; it is, do some checks, and update the record ++ ;; extract fields from list ++ (let* ((list-name (car listed)) ++ (list-n1 (car (cadr listed))) ++ (list-n2 (cadr (cadr listed))) ++ (list-increasing (caddr (cadr listed))) ++ (list-sure (cadddr (cadr listed))) ++ (list-real (cadddr (cdr (cadr listed)))) ++ ++ (name (car parsed)) ++ (n1 (car (cadr parsed))) ++ (n2 (cadr (cadr parsed))) ++ (increasing (caddr (cadr parsed))) ++ (sure (cadddr (cadr parsed))) ++ (real (cadddr (cdr (cadr parsed)))) ++ ++ (consistant (or (and list-increasing increasing) ++ (and (not list-increasing) ++ (not increasing)))) ++ ++ ) ++ ++ (cond ++ ((and list-sure consistant) ++ (begin ++ (set-cdr! listed ++ (verilog:update-record n1 n2 ++ list-n1 list-n2 ++ increasing ++ #t ++ real) ++ ))) ++ ((and list-sure (not sure) (zero? n1) (zero? n2)) ++ '() ;; this is a net without any expression, leave it ++ ) ++ ((and list-sure (not consistant)) ++ (begin ;; order is inconsistent ++ (display ++ (string-append "Warning: Net `" real "' has a " ++ "bit order that conflicts with " ++ "the original definition of `" ++ list-real "', ignoring `" ++ real "'" ++ )) ++ (newline))) ++ ((and (not list-sure) sure consistant) ++ (begin ++ (set-cdr! listed ++ (verilog:update-record n1 n2 ++ list-n1 list-n2 ++ increasing ++ #t ++ real)))) ++ ++ ((and (not list-sure) sure (not consistant)) ++ (begin ++ (set-cdr! listed ++ (verilog:update-record n1 n2 ++ list-n2 list-n1 ++ increasing ++ #t ++ real)))) ++ ((and (not list-sure) (not sure)) ++ (begin ++ (set-cdr! listed ++ (verilog:update-record n1 n2 ++ list-n1 list-n2 ++ increasing ++ #f ++ real)))) ++ (else ++ (begin ++ (display "This should never happen!") ++ (newline))) ++ ) ++ ) ++ ) ++ (begin ; it is not, just add it to the end ++ (set! the-nets ++ (append the-nets ++ (list parsed)))) ++ )) ++ ) ++ ++ all-unique-nets) ++ the-nets) ++ ) ++ verilog:get-nets ++)) + + ;; Retrieve the requested net record from the database. + +@@ -624,6 +632,7 @@ + (lambda (output-filename) + (let ((port (open-output-file output-filename))) + (begin ++ (verilog:get-nets-once!) + (verilog:write-top-header port) + (verilog:write-wires port) + (verilog:write-continuous-assigns port) +diff -urNad geda-gnetlist-1.4.0~/scheme/gnet-vhdl.scm geda-gnetlist-1.4.0/scheme/gnet-vhdl.scm +--- geda-gnetlist-1.4.0~/scheme/gnet-vhdl.scm 2007-12-30 08:20:19.000000000 +0530 ++++ geda-gnetlist-1.4.0/scheme/gnet-vhdl.scm 2008-08-19 12:14:32.000000000 +0530 +@@ -418,8 +418,9 @@ + ;;; + + (define unique-devices +- (vhdl:get-unique-devices (map get-device packages)) +-) ++ (lambda nil ++ (vhdl:get-unique-devices (map get-device packages)) ++)) + + + ;;; Signal Declaration +@@ -516,7 +517,7 @@ + ; Due to my taste will the component declarations go first + ; XXX - Broken until someday + ; THHE fixed today ;-) +- (vhdl:write-component-declarations unique-devices p) ++ (vhdl:write-component-declarations (unique-devices) p) + ; Then comes the signal declatations + (vhdl:write-signal-declarations p) + ) only in patch2: unchanged: --- geda-gnetlist-1.4.0.orig/debian/patches/00list +++ geda-gnetlist-1.4.0/debian/patches/00list @@ -0,0 +1 @@ +01_fix_vhdl_verilog_netlisting