Comment 41 for bug 587186

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Nick Lowe (nick-int-r) wrote :

It should do!

The basic semantics for choosing the NOP sequence were completely wrong. This has been fixed now.
The NOPL instruction is not supported by all i686 processors, the coded assumption was that they did. This has been changed by the recent AMD patches so that it is not assumed and it's specified as an extension where it is supported.

Examples of such processors that would otherwise run i686 code are the AMD Geode LX, Via C3, Via Eden and Transmeta Crusoe.

The benefit of full i686 optimisation, which do have real performance implications, are things like bswap (useful in networking), cmpxchg/xadd (used in atomics) and cmov (useful in compiler generated code).