Ubuntu
covered package

covered 0.7.10-4 source package in Ubuntu

Changelog

covered (0.7.10-4) unstable; urgency=medium

  [ Debian Janitor ]
  * Use secure copyright file specification URI.
  * Bump debhelper from deprecated 9 to 10.

  [ أحمد المحمودي (Ahmed El-Mahmoudy) ]
  * d/watch: update to standard 4
  * d/control: updated debhelper-compat to 13
  * d/control: updated standards version to 4.6.2
  * d/rules: DEB_HOST_MULTIARCH is pre-initialised
  * d/source.lintian-overrides: add overrides for HTML files reported to 0be without source.
    See: #1019980
  * d/control: remove autotools-dev from build-deps, no longer needs to be specified
  * d/covered-doc.install: set destination dir to /usr/share/doc/covered
  * d/control: Use deebhelper-compat instead of debhelper in build-deps.
    Remove debian/compat
  * Add typos.diff patch to fix spelling mistakes
  * d/control: add Rules-Requires-Root: no
  * Update copyright years

 -- أحمد المحمودي (Ahmed El-Mahmoudy) <email address hidden>  Tue, 18 Apr 2023 03:30:26 +0200

Upload details

Uploaded by:
Debian Electronics Team
Uploaded to:
Sid
Original maintainer:
Debian Electronics Team
Architectures:
any all
Section:
electronics
Urgency:
Medium Urgency

See full publishing history Publishing

Series Pocket Published Component Section
Plucky release universe electronics
Oracular release universe electronics
Noble release universe electronics
Mantic release universe electronics

Downloads

File Size SHA-256 Checksum
covered_0.7.10-4.dsc 1.8 KiB dea2a9594724be755dbcc32fe7c185853e4f5919acc183efd991438191aec0ec
covered_0.7.10.orig.tar.gz 3.0 MiB 08b859665ae1351d9641ebab08d049beb378ba3bceb4ed2c5fac01b2f1738f57
covered_0.7.10-4.debian.tar.xz 6.1 KiB 8cec378ecf3d1f2bc246e1ee9c8589f039545214e8803fe0d9868404c5378ecf

Available diffs

No changes file available.

Binary packages built by this source

covered: Verilog code coverage analysis tool

 Covered is a Verilog code coverage utility that reads in a Verilog design and
 a generated VCD/LXT dumpfile from that design and generates a coverage file
 that can be merged with other coverage files or used to create a coverage
 report. Covered also contains the GUI coverage report utility that reads in a
 coverage file to allow interactive coverage discovery. Areas of coverage
 measured by Covered are: line, toggle, memory, combinational logic, FSM
 state/state-transition and assertion coverage.

covered-dbgsym: debug symbols for covered
covered-doc: Verilog code coverage analysis tool - documentation

 Covered is a Verilog code coverage utility that reads in a Verilog design and
 a generated VCD/LXT dumpfile from that design and generates a coverage file
 that can be merged with other coverage files or used to create a coverage
 report. Covered also contains the GUI coverage report utility that reads in a
 coverage file to allow interactive coverage discovery. Areas of coverage
 measured by Covered are: line, toggle, memory, combinational logic, FSM
 state/state-transition and assertion coverage.
 .
 This package contains the documentation.