arachne-pnr 0.1+20190728gitc40fb22-2 source package in Ubuntu

Changelog

arachne-pnr (0.1+20190728gitc40fb22-2) unstable; urgency=medium

  * Team Upload.
  * Drop too strict version comparison
    - This is pulled fro corresponding fix in ubuntu
    - Thank you, Matthias Klose (Closes: #982852)
  * Mark autopkgtest as superficial (Closes: #974438)
  * Enable HOST_CC and HOST_CXX from dpkg buildflags
    - Upstream fixed Makefile in the new upstream version
    - Thank you, Helmut Grohne (Closes: #952971)
  * Declare compliance with policy 4.5.1

 -- Nilesh Patra <email address hidden>  Mon, 15 Feb 2021 19:21:33 +0530

Upload details

Uploaded by:
Debian Science Team
Uploaded to:
Sid
Original maintainer:
Debian Science Team
Architectures:
any all
Section:
misc
Urgency:
Medium Urgency

See full publishing history Publishing

Series Pocket Published Component Section
Jammy release universe misc

Downloads

File Size SHA-256 Checksum
arachne-pnr_0.1+20190728gitc40fb22-2.dsc 2.2 KiB ca39aeeeefd41271832a26f182f0d589234c78777fa57ae9920fcbe5222944bb
arachne-pnr_0.1+20190728gitc40fb22.orig.tar.xz 71.3 KiB 811274f6054d50d5baf7c645906eb1c3ed59eda434178a1a3fc68a2ba6227420
arachne-pnr_0.1+20190728gitc40fb22-2.debian.tar.xz 7.0 KiB c9de59d9a4a3b9fc2c3dde682db865a378947f127f921cb946246c8f05938a8c

No changes file available.

Binary packages built by this source

arachne-pnr: Place and route tool for iCE40 family FPGAs

 Arachne-pnr implements the place and route step of the hardware compilation
 process for FPGAs. It accepts as input a technology-mapped netlist in BLIF
 format, as output by the Yosys synthesis suite for example. It currently
 targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a
 textual bitstream representation for assembly by the IceStorm icepack command.
 The output of icepack is a binary bitstream which can be uploaded to a hardware
 device.
 .
 Together, Yosys, arachne-pnr and IceStorm provide an fully open-source
 Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.
 .
 The authors of arachne-pnr have now prepared its successor 'nextpnr'.

arachne-pnr-chipdb: Chip db files for arachne-pnr

 Arachne-pnr implements the place and route step of the hardware compilation
 process for FPGAs. It accepts as input a technology-mapped netlist in BLIF
 format, as output by the Yosys synthesis suite for example. It currently
 targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a
 textual bitstream representation for assembly by the IceStorm icepack command.
 The output of icepack is a binary bitstream which can be uploaded to a hardware
 device.
 .
 This package contains the binary versions of the chipdb files needed by
 arachne-pnr

arachne-pnr-dbgsym: debug symbols for arachne-pnr