[EGS] Replace Intel SVM with IOMMU SVA APIs

[quanxian]

Description:
Shared virtual address (SVA) capable accelerator device drivers on Intel
platform are required to call VT-d driver directly to bind a device with
a given address space. It is conceptually incorrect with the following
reasons:

A device driver is bypassing IOMMU generic layer
Device driver cannot be reused across architectures
Opens a door to duplicated code
Generic SVA APIs was introduced[1] and partially merged upstream which
created a common ground for vendor IOMMU driver to consolidate SVA code.

On the other hand, Uacce (Unified/User-space-access-intended Accelerator
Framework) [2] is emerging to be a generic user-kernel interface for SVA
capable devices.

IOMMU generic SVA APIs are used by Uacce. Therefore, replacing VT-d SVM
code with IOMMU SVA APIs are required by device drivers want to use
Uacce.

The features below will continue to work but are not included in this patch
in that they are handled mostly within the IOMMU subsystem.

IO page fault
mmu notifier
Consolidation of the above will come after generic IOMMU sva code[1].
This will be a second phase and under difference JIRA feature.
There should not be any changes needed for accelerator device drivers
during this time.

References:
[1] http://jpbrucker.net/sva/
[2] https://lkml.org/lkml/2020/1/15/604

Target Release: 20.10
Target Kernel: 5.8

[quanxian (quanxian-wang)]

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