Instruction scheduler miscalculates bit sizes of data addresses, generating immediates which do not fit the long immediate slots leading to failure to load the program
Bug #1367625 reported by
Heikki Kultala
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
TCE |
Fix Committed
|
Undecided
|
Jesper Hjorth |
Bug Description
ADF has 3 instruciton templates: 1 with full-size long immediate, one without long immediate, one with 16-bit long immediate.
Data is put to address which is >65536. This address needs the longerst-immediate instruction scheduler.
Scheduler puts this to instruction template which only has the 16-bit long immediate.
This program then fails to load to the simulator.
Changed in tce: | |
status: | New → Fix Committed |
assignee: | nobody → Jesper Hjorth (jesper-hjorth) |
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For instruction addresses the width of instruction addresses(size of instruction memory) is checked and used as bitwidth of jump targets etc in code.
Similar test should be added for data addresses (adddresses of global variables).