Attempting to use the ensure_programmability parameter in the InstructionDictionary code compressor fails.

[Paul Davey]

When trying to run generatebits on the second section of the FPGA tutorial in the manual with the InstructionDictionary code compressor and the ensure_programmability parameter set to yes it will fail saying it cannot ensure programmability. It claims the reason is as follows: Missing boolean register guard on bus: B1.
I was using a checkout of the 1.6 branch from the bazaar repository.

After asking in the IRC channel I believe this should not occur as the processor has two boolean registers both of which have inverted and non inverted guards on the only bus B1, which I believe is the minimum requirement for the compiler to generate code for it. Even adding two more boolean registers and guards for them does not solve this problem.

[Pekka Jääskeläinen (pekka-jaaskelainen)]

Like discussed in IRC, the "ensure programmability" is only half-implemented and tested even less. The largest missing piece is the instruction scheduler support for move/instruction dictionaries. Thus, it's not possible to restrict the selection of moves/instructions to only those that are found in the dictionary. Therefore, not considering this high priority before Someone finishes the implementation.