| 2010-06-17 14:45:01 |
Peter Lane |
bug |
|
|
added bug |
| 2010-06-18 17:51:44 |
Derick Eddington |
scheme-libraries: importance |
Undecided |
High |
|
| 2010-06-18 17:51:50 |
Derick Eddington |
scheme-libraries: assignee |
|
Derick Eddington (derick-eddington) |
|
| 2011-03-02 04:32:51 |
Derick Eddington |
scheme-libraries: assignee |
Derick Eddington (derick-eddington) |
|
|
| 2019-01-07 11:07:17 |
Peter Lane |
scheme-libraries: status |
New |
Fix Committed |
|
| 2019-01-07 11:07:43 |
Peter Lane |
description |
Small inconsistency with SRFI document:
> (import (srfi :43))
> (define b (vector 1 2 3 4))
> (vector-reverse-copy! b 0 b 0)
> b
#(4 3 3 4)
SRFI documentation says start=target & tstart=sstart means behaviour should be same as vector-reverse!
racket and sisc return #(4 3 2 1) for above example.
Suggest fix in 'vector-lib.scm'
add "((and (eq? target source) (= sstart tstart)) (vector-reverse! target tstart send))"
as first clause of 'cond' in 'vector-reverse-copy!' |
Small inconsistency with SRFI document:
> (import (srfi :43))
> (define b (vector 1 2 3 4))
> (vector-reverse-copy! b 0 b 0)
> b
#(4 3 3 4)
SRFI documentation says start=target & tstart=sstart means behaviour should be same as vector-reverse!
racket and sisc return #(4 3 2 1) for above example.
Suggest fix in 'vector-lib.scm'
add "((and (eq? target source) (= sstart tstart)) (vector-reverse! target tstart send))"
as first clause of 'cond' in 'vector-reverse-copy!' |
|
