x86-64 blendv instructions erroneously attempt to access the tn-offset of a register

Bug #1942674 reported by Marco Heisig
This bug affects 1 person
Affects Status Importance Assigned to Milestone

Bug Description

The third operand of a SSE4.1 blendv instruction must reside in XMM0, but the current check for this is flawed. The attached patch fixes the issue.

Revision history for this message
Marco Heisig (marco-heisig-h) wrote :
Stas Boukarev (stassats)
Changed in sbcl:
status: New → Fix Committed
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