Genet driver not handling BCM2711 limitations

Bug #2000285 reported by Erik Wolfner
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
Raspbian
New
Undecided
Unassigned

Bug Description

The BCM2711 Genet controller has a number of hardware limitations that are not accounted for with workarounds in the "bcmgenet.c" driver for Raspbian. I encountered these issues when developing a bare metal driver for the BCM2711 Genet controller. So far I have found no documentation to verify that what I am seeing is normal behavior.

The first issue that might already be known is that the UMAC_IRQ_LINK_UP and UMAC_IRQ_LINK_DOWN interrupts do not work, and never occur. The UMAC_MODE register is not implemented, so the MODE_LINK_STATUS bit cannot be tested. The only way to determine the actual link status is by reading from the PHY (via MDIO).

The second issue affects many registers for the DMA Rings. There are a number of registers that can only be written once after a hardware reset. Subsequent writes do not change the registers. The value written is ignored except for the first write. Performing a software reset of the MAC does not appear to allow writing to the registers again, only a hardware reset.

Since the registers have to be initialized, the work around is to write the registers with the desired initial value, then read the registers back and use the actual value read. The driver assumes that it can reset registers such as TDMA_READ_PTR back to the first descriptor in the ring, but that does not work. The register will still contain the value it had when DMA was stopped, before the software reset.

The ring registers that cause the most problems are the ones that the driver expects to reset before starting DMA.

TDMA_CONS_INDEX, TDMA_READ_PTR, RDMA_PROD_INDEX (lower 16-bits), RDMA_WRITE_PTR

Since the above registers cannot always be written, they must be read back and then the following registers must be set accordingly. Those registers can always be written.

TDMA_PROD_INDEX, TDMA_WRITE_PTR, RDMA_CONS_INDEX, RDMA_READ_PTR

I have not tested all the registers, and it is likely that there are more registers such as DMA_START_ADDR that can only be written once. My driver writes the same value for the other registers on every software reset. Those registers will only cause a problem if the ring sizes are changed without a hardware reset.

There is also the possibility that I missed some software or hardware reset done by the Linux driver, and that allows the registers to be written again. I believe I am resetting the Genet controller in the same way as the Linux driver.

To post a comment you must log in.
This report contains Public information  
Everyone can see this information.

Other bug subscribers

Remote bug watches

Bug watches keep track of this bug in other bug trackers.