| 2009-09-04 17:01:48 |
Benjamin David Lunt |
description |
I believe that the MSR resgister should also be reset to zero on a software reset. All of the FDC hardware I have does this.
The current code leaves the MSR as 0x80, which means that the controller is ready for a write. The controller should not
be ready for a write while in reset.
fdc.c Line 899
/* Reset */
if (!(value & FD_DOR_nRESET)) {
+ fdctrl->msr = 0x00;
if (fdctrl->dor & FD_DOR_nRESET) {
FLOPPY_DPRINTF("controller enter RESET state\n");
}
} else { |
I believe that the MSR resgister should also be reset to zero on a software reset. All of the FDC hardware I have does this. The current code leaves the MSR as 0x80, which means that the controller is ready for a write. The controller should not be ready for a write while in reset.
fdc.c Line 899
/* Reset */
if (!(value & FD_DOR_nRESET)) {
+ fdctrl->msr = 0x00;
if (fdctrl->dor & FD_DOR_nRESET) {
FLOPPY_DPRINTF("controller enter RESET state\n");
}
} else { |
|
