qemu-system-arm exits when cortex-m4 floating point used and irq occurs
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
QEMU |
Fix Released
|
Undecided
|
Unassigned |
Bug Description
qemu-system-arm exits with
"...Secure UsageFault with CFSR.NOCP because NSACR.CP10 prevents stacking FP regs
...taking pending nonsecure exception 3
Taking exception 7 [Breakpoint]
qemu: fatal: Lockup: can't escalate 3 to HardFault (current priority -1)"
when emulating Cortex-m4, executing at least 1 floating point instruction, and then an irq (e.g. sys tick) occurring.
CPACR.CP10 and CPACR.CP11 are set to 0x3 respectively prior to executing the fp instructions.
NOTE: NSACR does not appear to be a cortex m4 register.
Attached is a simplified elf to repro the issue.
The qemu command line is: "qemu-system-arm --gdb tcp::1234 -cpu cortex-m4 -machine lm3s6965evb -nographic -semihosting-config enable=
tags: | added: arm mprofile tcg |
tags: | added: testcase |
I think this patch should fix this bug:
https://<email address hidden>/