target-mips/dsp_helper.c: two possible bad shifts
Bug #1631625 reported by
dcb
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
QEMU |
Fix Released
|
Undecided
|
Unassigned |
Bug Description
target-
Source code is
temp = temp & ((0x01 << (size + 1)) - 1);
If size >= 32, then better code might be
temp = temp & ((0x01UL << (size + 1)) - 1);
target-
Duplicate
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Fix has been committed: git.qemu. org/?p= qemu.git; a=commitdiff; h=e6e2784cacd4c fec149
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