target-arm/helper.c:5493: bad test ?

[dcb]

[qemu/target-arm/helper.c:5493]: (style) Expression '(X & 0x1f) != 0xf80f0000' is always true.

Source code is

        (env->uncached_cpsr & CPSR_M) != CPSR_USER &&

but

./qemu/target-arm/cpu.h:#define CPSR_M (0x1fU)

./qemu/target-arm/cpu.h:#define CPSR_USER (CPSR_NZCV | CPSR_Q | CPSR_GE)

[Peter Maydell (pmaydell)]

On 26 February 2016 at 20:07, dcb <email address hidden> wrote:
> Public bug reported:
>
> [qemu/target-arm/helper.c:5493]: (style) Expression '(X & 0x1f) !=
> 0xf80f0000' is always true.
>
> Source code is
>
> (env->uncached_cpsr & CPSR_M) != CPSR_USER &&
>
> but
>
> ./qemu/target-arm/cpu.h:#define CPSR_M (0x1fU)
>
> ./qemu/target-arm/cpu.h:#define CPSR_USER (CPSR_NZCV | CPSR_Q | CPSR_GE)

Yeah, that's a bug. Should be ARM_CPU_MODE_USR, not CPSR_USER.

thanks
-- PMM

[Peter Maydell (pmaydell)]

Should be fixed by http://patchwork.ozlabs.org/patch/590051/

[Thomas Huth (th-huth)]

Fix should be part of QEMU v2.6.0:
http://git.qemu.org/?p=qemu.git;a=commit;h=8c4f0eb94cc65ee32a
... so I think this ticket can now be closed.