qemu: target-arm doesn't ignore SCTLR S/R bits in check_ap

[Peter Maydell]

In ARMv7 the SCTLR S and R bits were removed -- they are supposed to RAZ/WI in the register and obviously have no effect on memory access permission checks. However QEMU is still implementing the v6 behaviour even on v7 cores. We could fix this in two ways:
 * have target-arm/helper.c:check_ap() not look at ((c1_sys >> 8) & 3) if the V7 feature bit is set
 * have the SCTLR cp15 register write code refuse to set these bits if V7
 * do both...

Not very high priority as well-behaved guests won't try to set the S/R bits anyway.