qemu: target-arm doesn't ignore SCTLR S/R bits in check_ap
Bug #926216 reported by
Peter Maydell
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
Linaro QEMU |
Confirmed
|
Low
|
Unassigned |
Bug Description
In ARMv7 the SCTLR S and R bits were removed -- they are supposed to RAZ/WI in the register and obviously have no effect on memory access permission checks. However QEMU is still implementing the v6 behaviour even on v7 cores. We could fix this in two ways:
* have target-
* have the SCTLR cp15 register write code refuse to set these bits if V7
* do both...
Not very high priority as well-behaved guests won't try to set the S/R bits anyway.
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