Clock names error
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
PyECDAR |
New
|
Undecided
|
Unassigned |
Bug Description
when checking refinement between a component and itself,
or between a conjunction and one of the specifications
(e.g. T = Machine & MachineImpl; T >= MachineImpl)
pyecdar reports a bug
-------
AssertionError Traceback (most recent call last)
/local/
----> 1 T <= MachineImpl
/local/
404
405 def __le__(
--> 406 return self.refine(
407
408 def __ge__(
/local/
352
353 dbmpyuppaal.
--> 354 dbmpyuppaal.
355
356 refCheck = pyreachability.
/home/ltraonou/
318 """
319 for template in template_list:
--> 320 nta.context = parse_local_
321 template.clocks = {}
322 channels = {}
/home/ltraonou/
294 if declaration.type == 'clock':
295 clock_name = template.name + '.' + declaration.name
--> 296 context.
297 return context
298
/home/ltraonou/
383 clock = _Clock(self, clock_name, len(self.clocks))
384 self.clocks.
--> 385 assert(not (hasattr(self, clock_name)))
386 setattr(self, clock_name, clock)
387 def hasClockByName(
AssertionError:
-------
So pyecdar does not support checking refinement with itself because the two models have the same clock names.
Maybe due to the technique for refinement based on computed the product with the small spec and the reverse big spec,
since in that case small_spec and big_spec have clocks with the same name.
Solutions:
1 temporarily change the name of the clocks when checking refinement
2 change the name of the clocks when computing a product, either with a prefix or suffix