drc confused by outline

[Bdale Garbee]

DRC complains if features are too close to or overlapping "traces" on the outline layer. Please make it possible to exclude the outline layer from DRC.

[Peter Clifton (pcjc2)]

Marking this medium priority as:

1. We can do something about it quite eaily.
2. Littering lots of DRC errors can hide real issues

Ideally, we would add a DRC check for various feature to edge distances, but our "outline" layer is only drawn as a center line by convention, not by an enforced rule.

[Andrew Poelstra (asp11)]

A workaround for now is to add the pcb::skip-drc attribute to the outline layer.

Maybe the fix is to just do this by default on new boards?

[Bdale Garbee (bdale)]

On Thu, 29 Mar 2012 19:58:38 -0000, Andrew Poelstra <email address hidden> wrote:
> A workaround for now is to add the pcb::skip-drc attribute to the
> outline layer.

That's what I've been doing.

> Maybe the fix is to just do this by default on new boards?

Yes, that would make sense to me.

Bdale