pcb

Feature to hide previously acknowledged DRC violations

Bug #710666 reported by Peter Clifton on 2011-01-31
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
gEDA project
Wishlist
Unassigned
pcb
Wishlist
Chad Parker

Bug Description

Feedback from John Bass:

It would also be useful, if DRC automatically produced a text file with the error type, layer number, and the X/Y location pair of the DRC span that produced the failure ... and for error free scans, removed any such file from previous runs.

Peter Clifton's comment:

Whether the implementation relies of a file or not, what is really being asked for here is the ability to deliberately ignore a DRC violation (or hide the results) between subsequent runs.

Arguably, this is a symptom that our DRC rules are not flexible enough in their definition - or that we should allow localised or class based customisation of the DRC rules.

On the other hand.. the designer may violate some rules at some point during a design, and may wish to ignore that for a while whist she focuses on other issues.

Tags: drc Edit Tag help
Traumflug (mah-jump-ing) on 2015-09-27
Changed in geda-project:
importance: Undecided → Wishlist
summary: - Feature to hide peviously acknowledged DRC violations
+ Feature to hide previously acknowledged DRC violations
tags: added: drc
Changed in pcb:
status: New → In Progress
assignee: nobody → Chad Parker (parker-charles)
Changed in pcb:
status: In Progress → Confirmed
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