experimental feature enhancement: blind and buried vias
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
pcb |
Won't Fix
|
Wishlist
|
Unassigned |
Bug Description
Hello,
please excuse that I abuse the bug reporter to submit an experimental feature enhancement patch, but I did not find another way to submit such a patch.
I was in need to design a multilayer PCB with blind and buried vias. So I tried to add this functionality to PCB. It worked out quite well and I was able to complete the board. So I'm sending in the patch file.
However, this patch file is experimental/
- creation of blind and buried vias is controlled by layer visiblity at via creation time
- vias cannot be near each other, even if on different layers
- wires stick to vias not exisiting on the layer of the wire when moving the wire in rubber-band-mode
- ...
I'm even not really sure if my code is correct with respect to layers and groups. I suppose I've mixed this a few times.
I hope that my patch will be useful for someone in some way.
Regards,
stefan_BA
Changed in pcb: | |
importance: | Undecided → High |
Changed in pcb: | |
milestone: | none → next-feature-release |
Changed in pcb: | |
status: | New → Triaged |
Changed in geda-project: | |
importance: | Undecided → Medium |
status: | New → In Progress |
Changed in pcb: | |
importance: | High → Wishlist |
Changed in pcb: | |
status: | Triaged → Won't Fix |
milestone: | pcb-4.1.0 → none |
Hi stefan_BA,
Patching with:
patch -p1 < pcb-20080202- stefan_ BA-20080703. diff
in the pcb dir gives no problem or error messages.
configure doesn't complain either.
make complains about the texinfo.tex or pcb.texi being broken, maybe something in the patch regarding pcb.texi, allthough reading the patch I see no strange things.
<error log> MyDocuments/ projects/ gEDA/devel/ pcb-20080202/ missing --run makeinfo --html --css-include= ./pcb.css --no-split -I . \ ".:$TEXINPUTS" \
MAKEINFO= '/bin/sh /home/bert/ MyDocuments/ projects/ gEDA/devel/ pcb-20080202/ missing --run makeinfo -I .' \ texmf/web2c/ etex.fmt was written by pdfetex
if /bin/sh /home/bert/
-o pcb.htp pcb.texi; \
then \
rm -rf pcb.html; \
if test ! -d pcb.htp && test -d pcb; then \
mv pcb pcb.html; else mv pcb.htp pcb.html; fi; \
else \
if test ! -d pcb.htp && test -d pcb; then \
rm -rf pcb; else rm -Rf pcb.htp pcb.html; fi; \
exit 1; \
fi
TEXINPUTS=
texi2dvi pcb.texi
This is e-TeXk, Version 3.141592-2.2 (Web2C 7.5.4)
file:line:error style messages enabled.
%&-line parsing enabled.
---! /var/lib/
(Fatal format file error; I'm stymied)
/usr/bin/texi2dvi: texinfo.tex appears to be broken, quitting.
make[3]: *** [pcb.dvi] Error 1
</error log>
I hope this gives enough information.
A quick testing your patch gives the impression that this seems to work.
The testpcb gives some additional drill holes in the fab drawing (ps HID) outside the pcb limits).
I can send the pcb file if you will, just ask.
Kind regards,
Bert Timmerman <email address hidden>
BTW: I would normally make a diff with:
diff -Naur ....
instead of:
diff -C 3 -r ....
although patch did the job.