pcb

Min overlap DRC violation for widths more than half trace size

Bug #1901422 reported by Chad Parker
6
This bug affects 1 person
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pcb
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Bug Description

A minimum copper overlap violation is erroneously generated at 0,0 when the minimum copper overlap setting is more than half of the width of a trace on the board.
Example:
1. Draw a 20 mil trace on an empty board
2. Set the minimum copper overlap to 10 mils
3. DRC reports no violation
4. Set the minimum copper overlap to 11 mils
5. DRC reports the violation

All such traces are flagged as part of the violation, but the violation value is listed as 0.

We need to go through the DRC's test outputs and check for these violations. I verified all of the DRC violations before releasing the DRC updates, and I should have seen this if it was present in the DRC reports at that time.

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