pcb

GCode generator - wrong outline

Bug #1390439 reported by VaclavPe on 2014-11-07
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
gEDA project
Medium
Unassigned
pcb
High
Unassigned

Bug Description

I created following test PCB file and generated GCode. PCB file contains non-rectangular outline but GCode does not reflect it.

VaclavPe (vaclavpe) wrote :
Peter Clifton (pcjc2) wrote :

Verified.

Looks like the proximity of the outline to the board edge may be the first problem here, but also, there is some strange offsetting between the arc and line segments.

Changed in pcb:
status: New → Incomplete
status: Incomplete → Confirmed
VaclavPe (vaclavpe) wrote :

I looked at the gcode exporter code. And the only problem is that exporter takes the smallest posssible rectange for outline. there is no PNG curve tracing implemented.

tags: added: gcode-export
Traumflug (mah-jump-ing) on 2015-09-27
Changed in geda-project:
importance: Undecided → Medium
status: New → Confirmed
Changed in pcb:
importance: Undecided → High
Bert Timmerman (bert-timmerman) wrote :

Hi,

I just tested your example file and compared my gernerated gcode output with the provided gcode output (it's all in the zipfile).

Attached diff shows that in git HEAD 819db34a1482c9d5b08a9859ff0cf798eaa79cf3 the correct outline dimensions are generated.

Bert Timmerman (bert-timmerman) wrote :
Bert Timmerman (bert-timmerman) wrote :

Regarding the non-rectangular outline not reflected by gcode output, this needs to be implemented as is stated in the source code (gcode.c:1037):

    /*
     * Currently this is a rather simple implementation, which mills
     * the rectangular extents of the board and nothing else. This should
     * be sufficient for many use cases.
     *
     * A better implementation would have to group the lines and polygons
     * on the outline layer by outer polygon and inner holes, then offset
     * all of them to the right side and mill that.
     */
    /* a better implementation might look like this:
    LAYER_TYPE_LOOP (PCB->Data, max_copper_layer, LT_OUTLINE);
      {
        LINE_LOOP (layer);
          {
            ... calculate the offset for all lines and polygons of this layer,
            mirror it if is_bottom, then mill it ...
          }
        END_LOOP;
      }
    END_LOOP;

Changed in pcb:
milestone: none → next-feature-release
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