Incorrect MTRR caching attribute

Bug #1155700 reported by Samantha Jian-Pielak on 2013-03-15
8
This bug affects 1 person
Affects Status Importance Assigned to Milestone
The Open Compute Project
Medium
Unassigned

Bug Description

System under test: OCP v2
Release: 12.04.2 LTS
Architecture: amd64
Processor Information: Intel: Intel(R) Xeon(R) CPU E5-2620 0 @ 2.00GHz
RAM: 32G

Summary: FWTS https://wiki.ubuntu.com/Kernel/Reference/fwts/mtrr
FAILED [MEDIUM] MTRRIncorrectAttr: Test 1, Memory range 0x80000000 to 0xdfffffff (PCI Bus 0000:00)
has incorrect attribute Write-Combining.

Steps to reproduce:
sudo fwts mtrr -
..runs the test on your machine and dumps the output to stdout.
OR
sudo fwts mtrr
..runs the test on your machine and appends the output to the default log results.log.

======================================================================================

Results generated by fwts: Version V0.25.06precise1 (Tue Sep 4 12:56:28 CST 2012).

Some of this work - Copyright (c) 1999 - 2010, Intel Corp. All rights reserved.
Some of this work - Copyright (c) 2010 - 2012, Canonical.

This test run on 13/03/13 at 00:03:36 on host Linux ocpr0s2r 3.5.0-25-generic #39~precise1-Ubuntu
SMP Tue Feb 26 00:07:14 UTC 2013 x86_64.

Running tests: mtrr.

MTRR validation.
----------------------------------------------------------------------------------------------------
MTRR overview
-------------
Reg 0: 0x0000000000000000 - 0x0000000080000000 ( 2048 MB) Write-Back
Reg 1: 0x0000000100000000 - 0x0000000200000000 ( 4096 MB) Write-Back
Reg 2: 0x0000000200000000 - 0x0000000400000000 ( 8192 MB) Write-Back
Reg 3: 0x0000000400000000 - 0x0000000800000000 ( 16384 MB) Write-Back
Reg 4: 0x0000000800000000 - 0x0000000880000000 ( 2048 MB) Write-Back
Reg 5: 0x00000000d0000000 - 0x00000000d8000000 ( 128 MB) Write-Combining

Test 1 of 3: Validate the kernel MTRR IOMEM setup.
FAILED [MEDIUM] MTRRIncorrectAttr: Test 1, Memory range 0x80000000 to 0xdfffffff (PCI Bus 0000:00)
has incorrect attribute Write-Combining.

Test 2 of 3: Validate the MTRR setup across all processors.
PASSED: Test 2, All processors have the a consistent MTRR setup.

Test 3 of 3: Check for AMD MtrrFixDramModEn being cleared by the BIOS.
SKIPPED: Test 3, CPU is not an AMD, cannot test.

====================================================================================================
1 passed, 1 failed, 0 warnings, 0 aborted, 1 skipped, 0 info only.
====================================================================================================

1 passed, 1 failed, 0 warnings, 0 aborted, 1 skipped, 0 info only.

Test Failure Summary
====================================================================================================

Critical failures: NONE

High failures: NONE

Medium failures: 1
 mtrr: Memory range 0x80000000 to 0xdfffffff (PCI Bus 0000:00) has incorrect attribute Write-Combining.

Low failures: NONE

Other failures: NONE

Test |Pass |Fail |Abort|Warn |Skip |Info |
---------------+-----+-----+-----+-----+-----+-----+
mtrr | 1| 1| | | 1| |
---------------+-----+-----+-----+-----+-----+-----+
Total: | 1| 1| 0| 0| 1| 0|
---------------+-----+-----+-----+-----+-----+-----+

Changed in opencompute:
importance: Undecided → Medium
Alex Hung (alexhung) wrote :

@ Samantha,

can you please attach outputs of "sudo lspci -xxx > pci.log" and "sudo acpidump > acpi.log"?

Alex Hung (alexhung) wrote :

Intel's software manual has statements as below

"Write Combining (WC) — System memory locations are not cached (as with uncacheable memory) and coherency is not enforced by the processor’s bus coherency protocol. Speculative reads are allowed. Writes may be delayed and combined in the write combining buffer (WC buffer) to reduce memory accesses ... This type of cache-control is appropriate for video frame buffers, where the order of writes is unimportant as long as the writes update memory so they can be seen on the graphics display"

This makes it an unwise chance for hardware memory-mapped registers. Instead, BIOS should set MTRR to Uncacheable (UC / UC-).

However, it is difficult to evaluate what the "small delay" impacts the system.

pci.log

acpidump

To post a comment you must log in.
This report contains Public information  Edit
Everyone can see this information.

Other bug subscribers

Bug attachments