[uacce-0224]Add uacce module for Accelerator

[Fred Kimmy]

[Bug Description]

Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, which share
data content rather than address.
Because of unified address, hardware and user space of process can share
the same virtual address in the communication.

Uacce is intended to be used with Jean Philippe Brucker's SVA
patchset[1], which enables IO side page fault and PASID support.
We have keep verifying with Jean's sva patchset [2]
We also keep verifying with Eric's SMMUv3 Nested Stage patches [3]

[Steps to Reproduce]
1)
2)
3)

[Actual Results]

[Expected Results]

[Reproducibility]

[Additional information]
(Firmware version, kernel version, affected hardware, etc. if required):

[Resolution]

uacce: Add documents for uacce
uacce: add uacce driver
crypto: hisilicon - Remove module_param uacce_mode
crypto: hisilicon - register zip engine to uacce

https://lkml.org/lkml/2020/2/21/2170

[Andrew Cloke (andrew-cloke)]

Understand from HiSilicon that this is targeted at upstream 5.7.

[Ike Panhc (ikepanhc)]

Patches not yet hit mainline kernel. Expect to hit mainline about April 5th to 19th.

[Ike Panhc (ikepanhc)]

These patches are also listed in bug 1867591