Hidden pins with same name are automatically connected to same net

Bug #912529 reported by tdlrali
10
This bug affects 2 people
Affects Status Importance Assigned to Milestone
KiCad
Won't Fix
Undecided
Unassigned

Bug Description

If I connect the hidden VCC pins of two components to different nets, they end up being connected to the same net on the board.

Steps to reproduce:
1) Place a 7400 component, as well as a 7402 component.
2) Connect the (hidden) VCC pin of the 7400 to one net (eg +BATT)
3) Connect the VCC pin of the 7402 to another net (eg +5V)
4) Create a netlist, associate footprints, and read the netlist in PCBnew.

Behavior:
Both VCC pins are connected to the same net.

Expected Behavior:
The two VCC pins are connected to different pins.

Attached is an example project showing the behavior.

Revision history for this message
tdlrali (tdlrali) wrote :
Revision history for this message
tdlrali (tdlrali) wrote :

Here are two pictures of the example project, showing the behavior:
http://imgur.com/a/SQyIs
In the top picture (schematic), the VCC pins are connected to different nets.
In the bottom picture (board), the VCC pins (Pin 14) are connected to the same net.

I just realized that in the netlist (see example project) the two pins are already connected to the same net:
(
 ( /4F06166B SO14E U1 7400
  ( 1 ? )
  ( 2 ? )
  ( 3 ? )
  ( 7 GND )
  ( 14 +5V )
 )
 ( /4F061679 SO14E U2 7402
  ( 1 ? )
  ( 2 ? )
  ( 3 ? )
  ( 7 GND )
  ( 14 +5V )
 )
)

Revision history for this message
jean-pierre charras (jp-charras) wrote :

This is not a bug.
This is the normal behavior.
Invisible power pins having the same name are always connected together (see doc, chapt 5.5.4).

Changed in kicad:
status: New → Won't Fix
Revision history for this message
tdlrali (tdlrali) wrote :

I understand that this is the expected behavior at the moment, but I'd like to discuss alternative solutions that might bring certain advantages.

How about connecting all hidden pins with the same name together, UNLESS there are explicit connections?
I know that certain workarounds exist for multi-voltage designs (as in the original example above), such as separate components with different pin names - but is that really a good solution?

Revision history for this message
Lorenzo Marcantonio (l-marcantonio) wrote : Re: [Bug 912529] Re: Hidden pins with same name are automatically connected to same net

On Mon, Feb 13, 2012 at 11:31:26AM -0000, tdlrali wrote:
> I understand that this is the expected behavior at the moment, but I'd
> like to discuss alternative solutions that might bring certain
> advantages.
>
> How about connecting all hidden pins with the same name together, UNLESS there are explicit connections?
> I know that certain workarounds exist for multi-voltage designs (as in the original example above), such as separate components with different pin names - but is that really a good solution?

My *personal* opinion:
* Hidden power pins are not useful except on extremely simple circuits;
  examples:
  - Multirail/insulated supplies (one VCC for logic, one for analog,
    maybe one for an insulated power supply, mixed 5V/3.3V circuits and
    so on)

  - Need for filtering/protection (ferrites/diodes and so on in series
    with the supply)

  - Dynamically powered sections (whole ICs powered under a P-channel or
    something similar);

* There *is* provision for hidden supplies in the ISO standards but you
  have to tabulate the implicit connections (useful for the older
  massive-TTL circuits)

* More and more circuits have 'special' requisites for power supplies:
  you can't even distinguish between power input and output (many
  embedded regulators can be bypassed powering the chip from the
  regulator output --- with adequate connections).

* Explicit power pins make a better way to indicate decoupling
  capacitors (there are parts requiring a dozen of decouplers...)

* When you have an nn-pin chip (with nn > 10) a couple power pins aren't
  actually so inconvenient to draw...

So, I simply don't use the hidden pin feature :D

--
Lorenzo Marcantonio
Logos Srl

Revision history for this message
Timothée Manaud (timothee) wrote :

As I stumbled upon this problem while routing dual voltage (3V3 and 5V logic gates 74HCXX) I found this bug (yes its' a bug) and I'm definitely with tdlrali way: only automatically connect hidden pin if they are not connected.

Anyway, it seem the only workaround is to individually edit modules and un-hide power pins.

Revision history for this message
jean-pierre charras (jp-charras) wrote :

"yes its' a bug"
No this is not a bug: the only one reason to use power hidden pins is to have the pins automatically connected.
And try to connect wires to hidden pins is a nonsense.

Revision history for this message
Lorenzo Marcantonio (l-marcantonio) wrote :

On Wed, Aug 21, 2013 at 05:30:51PM -0000, jean-pierre charras wrote:
> "yes its' a bug"
> No this is not a bug: the only one reason to use power hidden pins is to have the pins automatically connected.

I'd rather say "that's not as a bug. It's working as designed and as documented."

With some kind of low power design/multiple power rails (or simply
split ground) hidden pins simply don't work; you have to use a library
with explicit power pins and connect them as intended. There is no other
way. Hidden pins are a convenience for the typical 'old style' board
where *everything* hangs from the +5V power rail...

> And try to connect wires to hidden pins is a nonsense.

AFAIK it doesn't register the connection, either.

--
Lorenzo Marcantonio
Logos Srl

Revision history for this message
Alexandru Gagniuc (mrnuke) wrote :

Oldie but goodie. The reality is that, as currently implemented, the hidden pins "feature" does not work in split supply designs. A large number of the symbol libraries that ship with Kicad use hidden pins. Kicad and its libraries form the product that ships.

The end result is that, the shipping product does not work when split supplies are involved. Whether the solution is to fix the handling of hidden pins, remove hidden pins from the libraries, or any other idea, this needs to be addressed. "Don't use hidden pins" is not an answer.

We all agree that there is a problem. Instead of saying "NO, THIS IS NOT A BUG!!! WON'T FIX!!!", please allow me to suggest a different approach. Start from the problem:

Several symbol libraries (4000, 7400, etc) do not work in split-supply designs, due to hidden pins sharing the rail name.

Then, as experts power users, and developers, discuss what the best solution is. Will it involve code changes? Will it involve library changes? Will it involve a redesign of the hidden pins paradigm?

Revision history for this message
Novak Tamas (novak-7) wrote :

My tips:
- make a design setting toggle: if "Using hidden pins" ticked, it works like by now. If unticked, hidden pins behave like normal pins: are shown and unconnected (default net connecting is disabled)

- find a solution for what tdlrali's proposal:
"How about connecting all hidden pins with the same name together, UNLESS there are explicit connections?"

If none of the above, my vote is throwing out the whole hidden pins system. It can be so dangerous, can cause so hard-to-spot problems, so rather forget it.
(The microsoft approach of "I know what you want, I do it for you automatically, you don't need to know about it" works for 90%, but a harmful crap for the few remaining)

This situation (e.g. for VCC I use mixed VCC, +3.3V, +5V, +1.8V, VBAT) is *not* rare, so anyhow I need to re-create lots of components.

I see, lots of libs must be re-designed if hidden-pin-system pitched out, so it's a lot of work...but still

Revision history for this message
Chris Pavlina (pavlina-chris) wrote :

I'm also strongly against the hidden pin "system". I wouldn't mind having a way to create a 'hidden' connection to power, but I do _not_ like it being implicit like that. That has serious potential to bite people. It strikes me as a feature that would be suggested and implemented by someone who's never made anything more complex than a novice hobbyist might. Anyone more experienced should be able to recognize quite quickly the danger of having such a thing around.

I doubt I'll be able to convince anyone to side with me, but I'm still going to put it out there - I am strongly in favor of dropping hidden pins in the upcoming sch format, and perhaps replacing them with something explicit.

Revision history for this message
Wayne Stambaugh (stambaughw) wrote :

Hidden pins are only implicit in that all (most?) of the components we
provide contain hidden power pins. There is really nothing forcing you
to use hidden power pins. You merely have to create components with
visible power pins and connect them accordingly. A much easier way to
resolve this would be to provide alternate libraries with components
with visible power pins which would force the user to provide direct
connections to them. I personally would rarely use them. I prefer not
to clutter up my schematics with power connections unless there is a
non-obvious reason to do so such as split power planes. I've been at
this long enough to know about the perils of hidden power pins. This to
me is a matter of personal taste. Removing the hidden pin system would
break existing designs and remove a perfectly valid albeit potentially
dangers feature. If we need to add a warning to the ERC (that can be
disabled) to let the user know that power connections have been made
that they may not be aware of, that's fine by me but ripping out hidden
power pin support to prevent users from making careless mistakes is
overkill.

On 6/6/2016 7:57 AM, Chris Pavlina wrote:
> I'm also strongly against the hidden pin "system". I wouldn't mind
> having a way to create a 'hidden' connection to power, but I do _not_
> like it being implicit like that. That has serious potential to bite
> people. It strikes me as a feature that would be suggested and
> implemented by someone who's never made anything more complex than a
> novice hobbyist might. Anyone more experienced should be able to
> recognize quite quickly the danger of having such a thing around.
>
> I doubt I'll be able to convince anyone to side with me, but I'm still
> going to put it out there - I am strongly in favor of dropping hidden
> pins in the upcoming sch format, and perhaps replacing them with
> something explicit.
>

Revision history for this message
Alexandru Gagniuc (mrnuke) wrote :

One of the solutions I've seen in other EDA programs is to have the power pins separate from the symbol, so that they can individually be connected to their respective power rails. Clean and effective.

Revision history for this message
Novak Tamas (novak-7) wrote :

My example: TQFP176 MCU with dozens of power pins. Two units: yellow unit B for power. Unit A for GPIOs sorted by ports.

Revision history for this message
Carl A. Adams (carlalex) wrote :

FWIW, I agree that it is at best a dangerous feature. Having to clone a symbol to disable the feature is a clumsy solution at best.

I not only frequently have multiple power rails at different voltages, it's also not uncommon for me to have multiple rails at the same voltage to support lower power modes where many components may be switched off.

I get not wanting to clutter up diagrams, but there has to be a better way to accomplish that.

Revision history for this message
Dumbster Bumbster (dumbster23) wrote :

If is not bug, than not obvious and unbelievable bad solution.
Not visible pins still visible, but haven't a dot.

This is potentially cause huge errors.

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