Need simple cluster-of-vias method
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
KiCad |
New
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Wishlist
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Unassigned |
Bug Description
For some surface mount power components, the manufacturer requires the designer to tie a single component pin (actually a very large pad) through a dozen or more vias to an inner layer or opposite side of the board for heat dissipation. PCBNEW 2007-11-29a makes this frustratingly difficult by deleting vias already tied in parallel to the same layers.
My interim solution for now is to define new module footprints for these power components with a multitude of pins tied to small pads, then wire each pad through a via in the pad to another layer, and finally to create zones on the component layer and inner layer that merge the pads into rectangular filled areas. This is a LOT of work, and my schematic looks weird with a huge number of pins on these components.