EEschema ERC ignore unpaired global labels :-(

[Michele Giorato]

I suspect that EEschema's ERC has some bugs in the verification of Global Labels in particular those that do not have corresponding labels in other sheets.
Unfortunately I discovered that in the pcb that I made is missing a trace that connects two pins located in different sheets.
Looking at the attached images you can immediately notice that the READER1_LED label is incorrect (it should be LED_READER1 following the same logic as LED_READER2).
As you can see in another sheet there are the corresponding LED_READER1 and LED_READER2.
Ok my mistake, the label is wrong, but something is not right anyway since the verification of individual labels is active among the DRC options.
I would at least expect a Warning that the label is unpaired but also that R23 has one of the pins disconnected ....

The project was done with the version of eschema a few months ago but the verification fails even with this nightly ..

Application: kicad
Version: 5.1.0-unknown-r15501-42d20cbd, debug build
Libraries:
    wxWidgets 3.0.4
    libcurl/7.61.1 OpenSSL/1.1.1b zlib/1.2.11 brotli/1.0.5 libidn2/2.1.1 libpsl/0.20.2 (+libidn2/2.0.5) libssh/0.8.7/openssl/zlib nghttp2/1.34.0
Platform: Linux 5.0.9-200.fc29.x86_64 x86_64, 64 bit, Little endian, wxGTK
Build Info:
    wxWidgets: 3.0.4 (wchar_t,wx containers,compatible with 2.8) GTK+ 3.24
    Boost: 1.66.0
    OpenCASCADE Community Edition: 6.9.1
    Curl: 7.61.1
    Compiler: GCC 8.3.1 with C++ ABI 1013

Build settings:
    USE_WX_GRAPHICS_CONTEXT=OFF
    USE_WX_OVERLAY=ON
    KICAD_SCRIPTING=ON
    KICAD_SCRIPTING_MODULES=ON
    KICAD_SCRIPTING_PYTHON3=ON
    KICAD_SCRIPTING_WXPYTHON=ON
    KICAD_SCRIPTING_WXPYTHON_PHOENIX=ON
    KICAD_SCRIPTING_ACTION_MENU=ON
    BUILD_GITHUB_PLUGIN=ON
    KICAD_USE_OCE=ON
    KICAD_USE_OCC=OFF
    KICAD_SPICE=ON

[Michael Kavanagh (michaelkavanagh)]

I can't reproduce this in the latest stable (5.1.2), the single label is flagged as expected.

Was this schematic designed in a nightly version after the new bus/online ERC stuff was merged?

Would you be able to upload a example project showing this behaviour?

[Jon Evans (craftyjon)]

@Michael the commit in the original report is on master branch, so this is with new ERC behavior.

@Michele -- I will take a look at this, but like Michael said, it would be helpful if you could share your project (either here or in private to me) to help debug.

[Michele Giorato (mr-miky64)]

I'm quite puzzled ...
I put down a really stupid schematic with the deliberately incorrect label 1REL instead of REL1.

The ERC !!! does not report the error ...

[Michele Giorato (mr-miky64)]

And pcbnew confirms it ...

Look at R1

[Jeff Young (jeyjey)]

How would Eeschema know that 1REL and REL1 were not /supposed/ to be two different nets?

A global net is not a connection between two or more sheets: it's just a way to say that all things with the same label are connected. I use global labels in single-sheet designs all the time.

[Michele Giorato (mr-miky64)]

So what is the "Test single istances for global labels" option for?

The problem remains that R1 has a terminal connected to nothing, at least a warning would have to be given

[Jeff Young (jeyjey)]

Good question. I don't know the answer to that. I can research it later, but I'm knee-deep in the modern toolkit right now....

[Michele Giorato (mr-miky64)]

If the 1REL label is removed and only the connection is left, the ERC
does not indicate that R1 has the terminal not connected.
Report error only if there is no wire connected to the pin.

[KiCad Janitor (kicad-janitor)]

Fixed in revision 4efed8a4dd4d2518da942686f031f2abcb99f0a2
https://git.launchpad.net/kicad/patch/?id=4efed8a4dd4d2518da942686f031f2abcb99f0a2

[Michele Giorato (mr-miky64)]

Are we really sure that the ERC is working properly?
The patch has fixed the problem of single global labels.
It remains to understand why a pin connected to a disconnected wire is not highlighted