solderbridges fail DRC checks

[Dick Hollenbeck]

I like the new solder-bridge footprints. Somebody spent a *lot* of time on them using pads. And they are beautiful. The 'normally closed' versions are flunking the DRC checks because the pads are touching, as they should in a normally closed version. I have a few similar footprints that used a copper layer rectangle to do the normally closed bridge. They also flunk the new DRC, whereas they would get a pass before. I had to comment that DRC test out in order to not ruin my signal to noise ratio in the DRC error summary. (This can quickly ruin your confidence on a board that once did pass.)

I think we either need to support tracks in footprints, or provide some kind of exclusion for solder-bridge footprints, either by name or by flag, or something better. Did I miss something somewhere that is a work around?

[Jeff Young (jeyjey)]

@Dick, there's a hack that you can use for now as a back door: make sure your Keywords start with "net tie".

This is just until we make net ties first-class citizens.

[Seth Hillbrand (sethh)]

@Jeff- Unfortunately, that hack only works for draw items to pad clearance. The library solder-bridge footprints are made using custom pads that are overlapping. And we can't simply mark pad-to-pad in the same footprint as passing without breaking a large usecase for DRC.

I think we need to have librarians address this for 5.1 until we can set a flag for pad connections in v6.

[Seth Hillbrand (sethh)]

Looks like there is already an issue open for this (https://github.com/KiCad/kicad-footprints/issues/1165) And there is a proposed fix. It would be good if it were merged for the 5.1 libraries.

[Dick Hollenbeck (dickelbeck)]

@Seth,

Once again your tip was very helpful. Going to 2 rectangles
roughly matching the supporting headers, let me put the daughter boardlet above the fray.

[KiCad Janitor (kicad-janitor)]

KiCad bug tracker has moved to Gitlab. This report is now available here: https://gitlab.com/kicad/code/kicad/-/issues/1798