(kicad_pcb (version 20171130) (host pcbnew "(6.0.0-rc1-dev-1180-g88a30eeda)")

  (general
    (thickness 1.6)
    (drawings 0)
    (tracks 0)
    (zones 0)
    (modules 1)
    (nets 1)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.25)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (via_size 0.8)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (edge_width 0.05)
    (segment_width 0.2)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.12)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.762)
    (pad_to_mask_clearance 0.051)
    (solder_mask_min_width 0.25)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010fc_ffffffff)
      (usegerberextensions false)
      (usegerberattributes false)
      (usegerberadvancedattributes false)
      (creategerberjobfile false)
      (excludeedgelayer true)
      (linewidth 0.150000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15.000000)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 1)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.25)
    (via_dia 0.8)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
  )

  (module Capacitor_SMD:CP_Elec_3x5.3 (layer F.Cu) (tedit 5B303299) (tstamp 5BE97162)
    (at 162.56 81.788)
    (descr "SMT capacitor, aluminium electrolytic, 3x5.3, Cornell Dubilier Electronics ")
    (tags "Capacitor Electrolytic")
    (attr smd)
    (fp_text reference C1 (at 0 -2.7) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value CP_Elec_3x5.3 (at 0 2.7) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user %R (at 0 0) (layer F.Fab)
      (effects (font (size 0.6 0.6) (thickness 0.09)))
    )
    (fp_line (start -2.85 1.05) (end -1.78 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -2.85 -1.05) (end -2.85 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.78 -1.05) (end -2.85 -1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.78 -1.05) (end -0.93 -1.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.78 1.05) (end -0.93 1.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.93 -1.9) (end 1.9 -1.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start -0.93 1.9) (end 1.9 1.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.9 1.05) (end 1.9 1.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start 2.85 1.05) (end 1.9 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 2.85 -1.05) (end 2.85 1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.9 -1.05) (end 2.85 -1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.9 -1.9) (end 1.9 -1.05) (layer F.CrtYd) (width 0.05))
    (fp_line (start -2.1875 -1.6225) (end -2.1875 -1.2475) (layer F.SilkS) (width 0.12))
    (fp_line (start -2.375 -1.435) (end -2 -1.435) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.570563 1.06) (end -0.870563 1.76) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.570563 -1.06) (end -0.870563 -1.76) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.870563 1.76) (end 1.76 1.76) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.870563 -1.76) (end 1.76 -1.76) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.76 -1.76) (end 1.76 -1.06) (layer F.SilkS) (width 0.12))
    (fp_line (start 1.76 1.76) (end 1.76 1.06) (layer F.SilkS) (width 0.12))
    (fp_line (start -0.960469 -0.95) (end -0.960469 -0.65) (layer F.Fab) (width 0.1))
    (fp_line (start -1.110469 -0.8) (end -0.810469 -0.8) (layer F.Fab) (width 0.1))
    (fp_line (start -1.65 0.825) (end -0.825 1.65) (layer F.Fab) (width 0.1))
    (fp_line (start -1.65 -0.825) (end -0.825 -1.65) (layer F.Fab) (width 0.1))
    (fp_line (start -1.65 -0.825) (end -1.65 0.825) (layer F.Fab) (width 0.1))
    (fp_line (start -0.825 1.65) (end 1.65 1.65) (layer F.Fab) (width 0.1))
    (fp_line (start -0.825 -1.65) (end 1.65 -1.65) (layer F.Fab) (width 0.1))
    (fp_line (start 1.65 -1.65) (end 1.65 1.65) (layer F.Fab) (width 0.1))
    (fp_circle (center 0 0) (end 1.5 0) (layer F.Fab) (width 0.1))
    (fp_text user 1 (at 0 0) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user 2 (at 0 0) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user 3 (at 0 0) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text user 4 (at 0 0) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (pad 2 smd rect (at 1.5 0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
    (pad 1 smd rect (at -1.5 0) (size 2.2 1.6) (layers F.Cu F.Paste F.Mask))
    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_3x5.3.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

)