Feature request: via calculator

Bug #1802222 reported by Gabriel Staples on 2018-11-08
This bug affects 3 people
Affects Status Importance Assigned to Milestone
Nabeel Ahmad

Bug Description

Version info: NA (applies to all versions)

I think it would be great to have a via calculator as a new tab near the trace width calculator. This is especially important for high-current and high-power applications. Just like we need to know what trace width to use to carry different currents, we need to know what via diameter and/or how many vias we need to use. Here are some sample calculators:

1. http://www.blackstick.co.uk/pcb-design-calculators/via-current-mm.php
2. http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/

Update: this tool has a ton of features worth duplicating as well. Please take a look at what it offers, and let's get all of the most useful features it offers into the KiCad calculator as well. I don't want to have to turn to other tools, I want KiCad to be so complete it's all I need. Thanks.

description: updated
tags: added: starter
Changed in kicad:
importance: Undecided → Wishlist
description: updated
description: updated
Changed in kicad:
status: New → Triaged
Nabeel Ahmad (nbl14) on 2018-11-27
Changed in kicad:
assignee: nobody → Nabeel Ahmad (nbl14)
Nabeel Ahmad (nbl14) wrote :

The patch is based on this online calculator [1]. The only difference in functionality is that the temperature rise parameter has been made variable.

[1]: http://circuitcalculator.com/wordpress/2006/03/12/pcb-via-calculator/

Seth Hillbrand (sethh) on 2018-12-09
Changed in kicad:
milestone: none → 6.0.0-rc1
Seth Hillbrand (sethh) wrote :

Hi Nabeel-

Thank you for your contribution. Unfortunately, it does not apply cleanly to the current master. Can you rebase and post again?

Nabeel Ahmad (nbl14) wrote :

Hi Seth,

A patch is attached after rebasing again. My local commit now sits on top of e50d9df76a17f731fb806b7c3ead18dd6857f024.

Seth Hillbrand (sethh) wrote :


Thanks! I applied the patch but I needed to use "ignore-whitespace". It appears that there are some differences there. I note that you have a tab indent in pcb_calculator_frame.cpp, so there may be some other spacing differences in your editor.

Some minor formatting issues: we use two empty lines between functions in cpp files, you need a space after an opening "(" and before a closing ")".

The layout should be improved. I'm attaching an image for your reference of what it looks like on my end. I don't think that the horizontal lines are needed. The spacing of the border is smaller on the bottom than on the sides. And this would greatly benefit from a diagram showing what the input dimension parameters mean. Doesn't need to be 3-d like the transline tab but a cross-section of the via with the relevant dimensions shown would be helpful.

In the code, it would be good to write out the mathematical formula that you are implementing and where you sourced it. I see you have references listed but it's good to be more specific. This will allow a future coder to review both the implementation and the underlying assumptions.

Last question: Why is temperature rise an input parameter? I don't think many of us will be able to calculate that in our heads. So we should either make some assumptions with additional input parameters for thermal conductivity or keep it at a constant temperature and note for the user what that means.

Overall, this is a good patch and once the v6 commit window opens, we should be able to add it to master with the above changes.

Wayne Stambaugh (stambaughw) wrote :

@Seth, please hold off on merging this patch until v6. We are in feature freeze for 5.1 and this is a new feature.

Seth Hillbrand (sethh) wrote :

Sure thing (Last paragraph of #4)

Nabeel Ahmad (nbl14) wrote :


Thank you for the detailed feedback. I will make the suggested improvements and upload a new patch.

>> Why is temperature rise an input parameter?
This calculator [1], which is mentioned in the bug description, uses temperature rise as an input parameter.
Moreover, temperature rise is also an input parameter in the Track Width tab of PCB Calculator. The formula used for calculations in this tab is the same formula used for calculating the estimated ampacity of the via in the new tab.

[1]: http://www.blackstick.co.uk/pcb-design-calculators/via-current-mm.php

Seth Hillbrand (sethh) wrote :

Oh, OK I see. That is the maximum temperature rise that you are willing to accept. We should probably have some tooltips for the fields.

Nabeel Ahmad (nbl14) wrote :

Okay, noted.

Nabeel Ahmad (nbl14) wrote :

An updated patch is attached. It changes the following things from the previous patch:
- Added diagram
- Added 3 tooltips
- Removed horizontal lines between parameters and results
- Updated comments and references about calculations in code

Please note that the patch contains tab characters from files generated by wxFormBuilder and GIMP.

A screenshot of the calculator is attached next.

Nabeel Ahmad (nbl14) wrote :
Nabeel Ahmad (nbl14) wrote :

I am attaching a proposed layout, which I think looks more polished. Please see if this design would be better. I have grouped inputs and outputs by category. Via dimensions affect all results, so they are kept separate. This layout also makes the length of the two columns almost equal.

Please also note that, for calculating thermal resistance, we are using a fixed value of thermal conductivity (401 W/m.K), which is the value for pure copper near room temperature [1]. Would it make sense to have it as a parameter?

[1]: http://www.goodfellow.com/E/Copper.html

Seth Hillbrand (sethh) wrote :

Hi Nabeel-

Thank you for your contribution! As you know we are just starting to open the dev branch for contributions so it won't be long before we can merge improvements like yours. I have a few comments for your latest patch:

1) Graphical changes should be in the style of existing graphics (colors/line thickness/etc)
2) No text in graphics (can't be translated). Variable names are OK e.g. 'D'.
2a) You _could_ overlay text onto the graphics if you are careful about sizing on monitors with alternate dpis

Otherwise looks great! It may be a week or so before the branch opens for all merges. After you make the changes above, I think we should push this patch. Anyone else have thoughts on this change?

Wayne Stambaugh (stambaughw) wrote :

@Nabeel, I prefer the layout from comment #11. It has a much cleaner appearance than your proposed layout changes (#12).

Nabeel Ahmad (nbl14) wrote :

@Seth and Wayne
Thank you for the feedback. I will update the patch as suggested.

Heitor (heitorpbittencourt) wrote :

This looks very useful!
The screenshot from comment #11 shows it is very simple to use.

May I ask to also include the formulas for inductance and capacitance? The book "High Speed Digital Design - A Handbook of Black Magic" describes it nicely in chapter 7.

Nabeel Ahmad (nbl14) wrote :


Thank you for the feedback.

I have studied the relevant section in the book you have mentioned. It can be implemented without any problem. However, I have a few questions about it.
1. In equation 7.6 in the book, epsilon_r is defined as "relative electric permeability". Is it the same as relative permittivity[1]? Can we use this term to avoid confusion with magnetic permeability?
2. Can we use a fixed value of epsilon_r (4.7 for FR-4), or should it be a user input?
3. In equation 7.6, can T (thickness of PCB) be different from via length?
4. Should we implement equations 7.8 and 7.11?

[1]: https://en.wikipedia.org/wiki/Relative_permittivity

Heitor (heitorpbittencourt) wrote :


That's great news!

I also found this document[1] from Analog Devices that describes the capacitance and inductance of the vias.

About your questions:
1. I'm not sure. Document [1] says "epsilon_r is the relative permeability", just after equation (4). So I guess it is the same.

2. I suggest to not fix the value. If you check the TransLine calculator you can see a list of values of epsilon_r and the substrates. If you could make something similar would be awesome!

3. It can. Imagine a board with several layers and a via connecting only layer 1 to 2. But that is not a huge problem, the formula for the parasitic capacitance should not be trusted blindly: it gives an estimative of the capacitance! I would trust only in the order of magnitude of the result.

4. Eq 7.8 and 7.11 describe how a capacitance/inductance degrades the rise-time of the signal in a 50 ohm transmission line. That's nice information to also have! Again I suggest to not fix the Z0 value of 50 Ohm, but a default value of 50.

[1] https://www.analog.com/en/analog-dialogue/articles/high-speed-printed-circuit-board-layout.html

Jeff Young (jeyjey) wrote :

Master is now open for 6.0, so it'd be great to get this wrapped up, rebased, and merged.

@Seth, where do we stand on it?

Seth Hillbrand (sethh) wrote :

@Nabeel- As soon as you can rebase your patch and address Wayne's comment in #14, we'll be able to push your changes to the master tree.

Nabeel Ahmad (nbl14) wrote :

This patch includes changes suggested by Seth and Heitor.

Nabeel Ahmad (nbl14) wrote :
Nabeel Ahmad (nbl14) wrote :

@Seth, have you been able to test the patch?

Seth Hillbrand (sethh) wrote :

@Nabeel- Sorry for the delay on my end. Between the holiday and KiCon coming this week, I've been too swamped to give your patch a good test. I'll have time to test/merge after the 28th.

One quick request that I see I missed previously, can you add licensing information to the SVG file you have created. In Inkscape you can do this under File->Document Properties->License. Please use CC Attribution-ShareAlike.

Nabeel Ahmad (nbl14) wrote :

The attached patch contains updated licensing information in the SVG file.

Seth Hillbrand (sethh) wrote :

Looks good Nabeel! Thank you for your contribution to KiCad

KiCad Janitor (kicad-janitor) wrote :

Fixed in revision 9f189ca71a7243587d3e83e0171862d224ed56fd

Changed in kicad:
status: Triaged → Fix Committed
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