From e271165cfb00f73b671d1955c88e18ede894547a Mon Sep 17 00:00:00 2001
From: Maciej Suminski <maciej.suminski@cern.ch>
Date: Wed, 4 Jul 2018 10:23:40 +0200
Subject: [PATCH] DRC: test for items located on disabled layers

---
 pcbnew/drc.cpp      | 45 +++++++++++++++++++++++++++++++++++++++++++++
 pcbnew/drc.h        |  3 +++
 pcbnew/drc_item.cpp |  2 ++
 3 files changed, 50 insertions(+)

diff --git a/pcbnew/drc.cpp b/pcbnew/drc.cpp
index e6c367f58..83a195088 100644
--- a/pcbnew/drc.cpp
+++ b/pcbnew/drc.cpp
@@ -514,6 +514,14 @@ void DRC::RunTests( wxTextCtrl* aMessages )
         doFootprintOverlappingDrc();
     }
 
+    testDisabledLayers();
+
+    if( aMessages )
+    {
+        aMessages->AppendText( _( "Items on disabled layers...\n" ) );
+        aMessages->Refresh();
+    }
+
     // update the m_drcDialog listboxes
     updatePointers();
 
@@ -1014,6 +1022,43 @@ void DRC::testTexts()
 }
 
 
+void DRC::testDisabledLayers()
+{
+    BOARD* board = m_pcbEditorFrame->GetBoard();
+    LSET disabledLayers = board->GetEnabledLayers().flip();
+    wxString msg;
+
+    auto createMarker = [&]( BOARD_ITEM* aItem )
+    {
+        msg.Printf( _( "\"%s\" is on a disabled layer" ), aItem->GetSelectMenuText() );
+        m_currentMarker = fillMarker( aItem->GetPosition(), DRCE_DISABLED_LAYER_ITEM,
+                msg, m_currentMarker );
+        addMarkerToPcb( m_currentMarker );
+        m_currentMarker = nullptr;
+    };
+
+    for( auto track : board->Tracks() )
+    {
+        if( disabledLayers.test( track->GetLayer() ) )
+            createMarker( track );
+    }
+
+    for( auto module : board->Modules() )
+    {
+        module->RunOnChildren( [&]( BOARD_ITEM* aItem ) {
+            if( disabledLayers.test( aItem->GetLayer() ) )
+                createMarker( aItem );
+        } );
+    }
+
+    for( auto zone : board->Zones() )
+    {
+        if( disabledLayers.test( zone->GetLayer() ) )
+            createMarker( zone );
+    }
+}
+
+
 bool DRC::doTrackKeepoutDrc( TRACK* aRefSeg )
 {
     // Test keepout areas for vias, tracks and pads inside keepout areas
diff --git a/pcbnew/drc.h b/pcbnew/drc.h
index 69545bf03..3109e67ca 100644
--- a/pcbnew/drc.h
+++ b/pcbnew/drc.h
@@ -90,6 +90,7 @@
                                                     ///< (not convertible to a closed polygon with holes)
 #define DRCE_MICRO_VIA_NOT_ALLOWED             47   ///< micro vias are not allowed
 #define DRCE_BURIED_VIA_NOT_ALLOWED            48   ///< buried vias are not allowed
+#define DRCE_DISABLED_LAYER_ITEM               49   ///< item on a disabled layer
 
 
 class EDA_DRAW_PANEL;
@@ -310,6 +311,8 @@ private:
 
     void testTexts();
 
+    void testDisabledLayers();
+
     //-----<single "item" tests>-----------------------------------------
 
     bool doNetClass( const std::shared_ptr<NETCLASS>& aNetClass, wxString& msg );
diff --git a/pcbnew/drc_item.cpp b/pcbnew/drc_item.cpp
index eccfe04e6..4c3918e82 100644
--- a/pcbnew/drc_item.cpp
+++ b/pcbnew/drc_item.cpp
@@ -75,6 +75,8 @@ wxString DRC_ITEM::GetErrorText() const
         return wxString( _( "Micro Via: not allowed" ) );
     case DRCE_BURIED_VIA_NOT_ALLOWED:
         return wxString( _( "Buried Via: not allowed" ) );
+    case DRCE_DISABLED_LAYER_ITEM:
+        return wxString( _( "Item on a disabled layer" ) );
     case COPPERAREA_INSIDE_COPPERAREA:
         return wxString( _( "Copper area inside copper area" ) );
     case COPPERAREA_CLOSE_TO_COPPERAREA:
-- 
2.17.1