Kicad lacks a physical design language

[jt_eaton]

Kicad lacks a physical design language needed to pass engineering notes from the schematic to the layout program.

A component and netlist does not contain enough information to design anything but the simplest PCB. Trace and placement requirements are usually listed in engineering notes that must be manually transferred and implemented.

Kicad needs to define a way to enter this information in such a way that it can be used by the pcb program .

[Maciej Suminski (orsonmmz)]

Would you give some examples? The simplest one I can think of are track impedance constraints or differential pair definitions. I have frequently seen simple text messages saying e.g. "place C1 next to IC5", but they are just notes for the layout designer, not the layout application. I am curious about your ideas.

[jt_eaton (z3qmtr45)]

Netlist says the U34 pin 16 and C56 pin 1 both connect to VDD.

I create a "leg" on the schematic between U34 pin 16 and C56 pin 1.

I create a rule that the length of that leg is EXACTLY 1.5 pin spacings.

If you place that cap any where other than next to that IC then the drc check will fail and you will know there is an error.

It will also fail if you place it 1.0 pin spacings away from the IC. We don't allow this because you can hand stuff a board one row off and it will still fit. Make it 1.5 off and it won't fit the board.

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You create two legs for a pair of differential signals. Create a rule that the length difference must be less than a certain amount to catch problems with matching

John Eaton

[Rene Poeschl (poeschlr)]

This might be a similar underlying request to https://bugs.launchpad.net/kicad/+bug/1571930 but with a different suggested solution.

[eelik (eelik)]

This is the original discussion (I think): https://forum.kicad.info/t/automating-engineering-requirement-notes/9457

And then this: https://forum.kicad.info/t/suggestion-for-a-place-wire-proximity-priority-option-in-schematic/9629

[Wayne Stambaugh (stambaughw)]

Technically there is nothing preventing kicad from passing this information from the schematic editor to the board editor using the netlist. There has already been a discussion about passing predefined netclass information so this information you presented here is parametric in nature. Of course passing this information is the trivial part. Updating the board editor to handle this parametric information is far more involved.

[eelik (eelik)]

I wonder how much could be done with python scripts in the board editor side. Doing things "dynamically" or "on-the-fly" (event based while editing) isn't possible ATM, but some checks and changes could be done.

[Rene Poeschl (poeschlr)]

Another wishlist bug that might be related: https://bugs.launchpad.net/kicad/+bug/983230

[jt_eaton (z3qmtr45)]

Adding this into the netlist opens a can of worms in that any change could break existing code.
Add it as a new file and nothing breaks because no one is currently reading that file.

You could combine this with position info like the initial location and orientation for the components

Engineer creates a list of "legs" with unique names. Each leg is a pair of pins connected to the same node.

The engineer can then create a set of rules.

1) Length of any leg must be greater,less or equal to a constant value

2) Difference of any two leg lengths must be less ,greater or equal to a constant value

3) Leg can have a minimum current rating to ensure trace width and number of vias.

4) Separation between two legs must be less ,greater or equal to a constant. * can be used for one
   leg to force a minimum separation for hi voltage traces. A maximum can be used to minimize loop
   area from two traces.

5) The number of traces for that leg can be set to 1 to force a single point connection or 4 to
   force a grid.

John Eaton

[KiCad Janitor (kicad-janitor)]

KiCad bug tracker has moved to Gitlab. This report is now available here: https://gitlab.com/kicad/code/kicad/-/issues/2108