Splitting bus in hierarchical schematic

[Hildo Guillardi Júnior]

I have one hierarchical project. The main sheet repeat sometimes some subsheet and pass to them part of a bus (some bits / channels).
The interesting is that the first hierarchical works and the net are correctly connected, but the last ones aren't.

I am send some pictures of the project and the link of the discussion in the KiCad forum for more informations.

https://forum.kicad.info/t/problems-connecting-a-bus-from-a-hierarchical-sheet-to-root-sheet/5710

[Hildo Guillardi Júnior (hildogjr)]

Now I am adding the work around solution give by Pedro in the forum.

Check that now works fine the net, as I want, but the schematic is a little crowd.

[jean-pierre charras (jp-charras)]

What is the purpose of this report?
There is no bug and no question.

[Hildo Guillardi Júnior (hildogjr)]

An enhancement to bus interpretation.
In "Screenshot from 2017-11-05 16-11-53.png" is how I worked around to work my schematic. But I like to do it as the simple way said in the first message, passing the bus connections in the order to the hierarchical block.

[Hildo Guillardi Júnior (hildogjr)]

To registration of some developed ideas
https://forum.kicad.info/t/replicate-layout-action-plugin/8539
https://github.com/MitjaNemec/Kicad_action_plugins

[Launchpad Janitor (janitor)]

[Expired for KiCad because there has been no activity for 60 days.]

[Dustin Kendall (kendalld)]

The issue is, busses can be passed along between sub-sheets and imported pins, but not between a sub-sheet and a parent in the same manner. It is extremely annoying.

[Hildo Guillardi Júnior (hildogjr)]

Good comment, @ Dustin.
In my example I want just do:

1) At the first block:
signal+[0..3] |--- AI+[0..3]
signal-[0..3] |--- AI-[0..3]

2) At the second block:
signal+[0..3] |--- AI+[4..7]
signal-[0..3] |--- AI-[4..7]

And KiCad connect them on the sequence. Without need to open each wire do specify (this was the workaround).