pcbnew: drc gives many errors with clearance violation of via to track, track to track

Bug #1593373 reported by Eldar Khayrullin
34
This bug affects 7 people
Affects Status Importance Assigned to Milestone
KiCad
Fix Released
Low
Tomasz Wlostowski

Bug Description

When I measure this places with error marked I see clearance 0.2mm (in rules I set clearance 0.2mm) - should be Ok, but I have many DRC errors.
I routed in GAL.

Application: kicad
Version: 4.1.0-alpha+201606160817+6936~45~ubuntu16.04.1-product, release build
Libraries: wxWidgets 3.0.2
           libcurl/7.47.0 OpenSSL/1.0.2g zlib/1.2.8 libidn/1.32 librtmp/2.3
Platform: Linux 4.4.0-24-generic x86_64, 64 bit, Little endian, wxGTK
- Build Info -
wxWidgets: 3.0.2 (wchar_t,wx containers,compatible with 2.8)
Boost: 1.58.0
Curl: 7.47.0
KiCad - Compiler: GCC 5.3.1 with C++ ABI 1009
        Settings: USE_WX_GRAPHICS_CONTEXT=OFF
                  USE_WX_OVERLAY=OFF
                  KICAD_SCRIPTING=ON
                  KICAD_SCRIPTING_MODULES=ON
                  KICAD_SCRIPTING_WXPYTHON=ON
                  USE_FP_LIB_TABLE=HARD_CODED_ON
                  BUILD_GITHUB_PLUGIN=ON

Tags: drc gal pcbnew
Revision history for this message
Eldar Khayrullin (eldar) wrote :
Revision history for this message
Eldar Khayrullin (eldar) wrote :
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Eldar Khayrullin (eldar) wrote :
summary: - pcbnew: drc give many errors with clearance violation of via to wire
+ pcbnew: drc give many errors with clearance violation of via to track
tags: added: gal pcbnew
Revision history for this message
Eldar Khayrullin (eldar) wrote : Re: pcbnew: drc give many errors with clearance violation of via to track

Same with diffpairs. See board

Eldar Khayrullin (eldar)
summary: - pcbnew: drc give many errors with clearance violation of via to track
+ pcbnew: drc gives many errors with clearance violation of via to track
Revision history for this message
Tomasz Wlostowski (twlostow) wrote : Re: pcbnew: drc gives many errors with clearance violation of via to track

Hi Eldar,

Could you send me (in private) the board file?

Best,
Tom

Changed in kicad:
assignee: nobody → Tomasz Wlostowski (twlostow)
Revision history for this message
Eldar Khayrullin (eldar) wrote :

Hi Tomasz. I sent to your email my pcb board file

Revision history for this message
Eldar Khayrullin (eldar) wrote :

I calculate the clearance of one diffpair:
coordY1-coordY2-lineWidth=
151,099999−150,400001-0,5=0,199998 (DRC error, clearance should be 0,2).
Is GAL router use floating point numbers? If Yes: is this floating point rounding error?

Revision history for this message
Eldar Khayrullin (eldar) wrote :

Then I calculated the clearance between one via and vertical track:
coordXTrack-coordXVia-trackWidth/2-viaDia/2=
192.75−191.75-0.5/2-1.1/2=0.2 (DRC error, but why?)
No floating point errors?

Revision history for this message
xzcvczx (xzcvczx) wrote :

I am wondering whether this is a duplicate of https://bugs.launchpad.net/kicad/+bug/1026337

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Eldar Khayrullin (eldar) wrote :

To twlostow, What status is?

Revision history for this message
Eldar Khayrullin (eldar) wrote :

When I set clearance 0.21 then after re-routing I have as a result clearance 0.21001 and DRC-OK.

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Eldar Khayrullin (eldar) wrote :

But diffpairs routed with clearance 0.21 give a clearance 0.21 and DRC error.
For this and the previous message clearance set 0.21 in Design Rules.

Revision history for this message
Novak Tamas (novak-7) wrote :

Confirmed.
I have two horizontal tracks. Manually edited the Y coords (both ends of both lines) to exact values:
one is .05, the other to .5, so distance of centerlines is 0.45mm.
Both widths are 0.25 and DRC clearance is 0.2mm,so it is on the the edge. I got the DRC error.

If I set the lower line to .50001 instead of .5, DRC error is gone.

(May that be simply a "<" instead of "<=" ?)

Changed in kicad:
status: New → Confirmed
importance: Undecided → Low
Revision history for this message
Simon Richter (sjr) wrote :

Really sounds like a floating point issue.

0.5 can be represented exactly. 0.2 cannot.

Revision history for this message
Chris Pavlina (pavlina-chris) wrote :

Possibly we should factor out the clearance-checking code used by PNS and DRC, combine them into one, and use the same code in both places to ensure consistency. Out of curiosity, is anyone still looking into fixing this?

Revision history for this message
Maciej Suminski (orsonmmz) wrote : Re: [Bug 1593373] Re: pcbnew: drc gives many errors with clearance violation of via to track

Ideally, we would use the PNS model as the default one: r-tree, geometry
library (could solve also a few problems in the ratnsnest algorithm),
and there you go - a big refactoring! It sounds too scary to me to do it
before removing the legacy canvas.

Revision history for this message
Felix Uhl (ifreilicht) wrote : Re: pcbnew: drc gives many errors with clearance violation of via to track

I'm having the exact same problem with clearance set to 0.1mm. The annoying part is that while routing, neither Legacy nor OpenGL canvas detect a clearance problem, but the DRC does.

As a workaround I just set the clearance to 0.099999mm, but it would be nice if this could be fixed. It's really annoying to route five traces right next to each other at the exact clearance only to get two DRC errors for each later.

Revision history for this message
Tomasz Wlostowski (twlostow) wrote : Re: [Bug 1593373] Re: pcbnew: drc gives many errors with clearance violation of via to track

On 18.12.2016 22:54, Felix Uhl wrote:
> I'm having the exact same problem with clearance set to 0.1mm. The
> annoying part is that while routing, neither Legacy nor OpenGL canvas
> detect a clearance problem, but the DRC does.
>
> As a workaround I just set the clearance to 0.099999mm, but it would be
> nice if this could be fixed. It's really annoying to route five traces
> right next to each other at the exact clearance only to get two DRC
> errors for each later.
>
Could you attach the board that shows the error?

Tom

Revision history for this message
Antoine (acalando) wrote :

I guess that I am having the same problem.

I just reproduced it easily by making two parallel tracks at 0.2mm one from each other.

Now if I try to increase the size of the track "pad 1", i.e. to move the bottom right end horizontally towards the right, I will get an error: each time I click again to finish the move, I get "err 16 or17: two tracks end too close"... except for some specific distances! E.g. dx += 0.5mm will be refused, but dx += 0.925mm will be accepted.

Track width: 0.25mm
Grid: 0.025mm
Clearance: 0.2mm

Revision history for this message
Antoine (acalando) wrote :

And here is a close-up of the previous screenshot.

Revision history for this message
Antoine (acalando) wrote :

Forgot to give version: 4.0.6-e0-6349~53~ubuntu16.04.1

(also: it is the first time I am designing a board since... hum, a very long time, and I am amazed how powerful and easy to use is Kicad. Many thx for this great work!)

Eldar Khayrullin (eldar)
summary: - pcbnew: drc gives many errors with clearance violation of via to track
+ pcbnew: drc gives many errors with clearance violation of via to track,
+ track to track
Revision history for this message
Seth Hillbrand (sethh) wrote :

It looks like this is fixed in the current master. Is this currently reproducible?

Revision history for this message
KiCad Janitor (kicad-janitor) wrote :

Fixed in revision 73408f3f21b12376999a421d0fc426561f07416a
https://git.launchpad.net/kicad/patch/?id=73408f3f21b12376999a421d0fc426561f07416a

Changed in kicad:
status: Confirmed → Fix Committed
Changed in kicad:
status: Fix Committed → Fix Released
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