Interactive routing causes intermittent DRC violations for pads with extended clearance

[pipe]

I have a few pads with extended clearance, and it seems like the interactive router "randomly" ignores the clearance. It will happily route a track through the forbidden area, which can be verified by then running the DRC - the errors are reported.

I recorded a short video showing the behavior using an exaggerated clearance. I extended the solder mask with the same amount so that the clearance limit can be easily seen.

Application: kicad
Version: (2016-03-17 BZR 6625, Git 1c19699)-product, debug build
Libraries: wxWidgets 3.0.2
           libcurl/7.47.0 OpenSSL/1.0.2g zlib/1.2.8 libidn/1.32 libssh2/1.5.0 nghttp2/1.8.0 librtmp/2.3
Platform: Linux 4.3.0-1-amd64 x86_64, 64 bit, Little endian, wxGTK
- Build Info -
wxWidgets: 3.0.2 (wchar_t,wx containers,compatible with 2.8)
Boost: 1.58.0
Curl: 7.47.0
KiCad - Compiler: GCC 5.3.1 with C++ ABI 1009
        Settings: USE_WX_GRAPHICS_CONTEXT=OFF
                  USE_WX_OVERLAY=OFF
                  KICAD_SCRIPTING=ON
                  KICAD_SCRIPTING_MODULES=ON
                  KICAD_SCRIPTING_WXPYTHON=ON
                  USE_FP_LIB_TABLE=HARD_CODED_ON
                  BUILD_GITHUB_PLUGIN=ON

[pipe (pipatron)]

Attached is an image of what I mean with extended clearance.

[fluffyfrog (frotteefrosch)]

I'm not shure if this belongs here or to bug #1333100

on BZR6537 OSX 10.10.5 clearences are not shown at all although checkd in the display menu. The router will let me lay a track through the clearance although rule checking is activated. DRC will give me an error, though.

[Joakim Asplund (joakimas)]

I can reproduce this for pads with large clearance (I've tried 3.5 mm).

It seems pns_node.cpp has a hardcoded value for maximum clearance of 0.8 mm which is used in some searches. If I change this to 5.0 mm, as in the diff below, I can't seem to reproduce the problem as long as I've set the pad clearance to 3.5 mm, but the problem appears again if I increase the pad clearance to 8 mm.

It seems a hardcoded value here isn't suitable.

diff --git a/pcbnew/router/pns_node.cpp b/pcbnew/router/pns_node.cpp
index 6614408..0ada3d9 100644
--- a/pcbnew/router/pns_node.cpp
+++ b/pcbnew/router/pns_node.cpp
@@ -53,7 +53,7 @@ NODE::NODE()
     m_depth = 0;
     m_root = this;
     m_parent = NULL;
- m_maxClearance = 800000; // fixme: depends on how thick traces are.
+ m_maxClearance = 5000000; // fixme: depends on how thick traces are.
     m_ruleResolver = NULL;
     m_index = new INDEX;

[Joakim Asplund (joakimas)]

After some more analysis, it seems like the code tries to use a value based on the board design parameters. However, this value is not propagated to child nodes when they are created. Furthermore, even when calculated based on board parameters, the calculation doesn't take into account local pad/module clearance settings.

Maybe keeping track of max clearance would be better left to the RULE_RESOLVER object?

[KiCad Janitor (kicad-janitor)]

Fixed in revision 3c6d17026ebbdb63db5eff5bc25f47fbc3342fa2
https://git.launchpad.net/kicad/patch/?id=3c6d17026ebbdb63db5eff5bc25f47fbc3342fa2