R5263: pcbnew: VRML export creates defective solids

Bug #1393277 reported by DemoFreak
10
This bug affects 1 person
Affects Status Importance Assigned to Milestone
KiCad
Invalid
Undecided
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Bug Description

Application: kicad
Version: (2014.11.12 BZR5263)-product Debug build
wxWidgets: Version 3.0.2 (release,wchar_t,compiler with C++ ABI 1002,GCC 4.8.3,STL containers,compatible with 2.8)
Platform: Linux 3.17.1-1.g5c4d099-desktop x86_64, 64 bit, Little endian, wxGTK
Boost version: 1.54.0
         USE_WX_GRAPHICS_CONTEXT=OFF
         USE_WX_OVERLAY=OFF
         KICAD_SCRIPTING=ON
         KICAD_SCRIPTING_MODULES=ON
         KICAD_SCRIPTING_WXPYTHON=ON
         USE_FP_LIB_TABLE=HARD_CODED_ON
         BUILD_GITHUB_PLUGIN=ON

--8<--

While exporting the PCB to VRML using File -> Export -> VRML there are a few issues:

1. the option "use absolute paths" acts reversed (ticked exports relative paths, unticked exports absolute paths)
2. all PCB layers and elements will be exported, nethertheless they were deactivated in the layers toolbar
3. the exported VRML file seems to have defective surfaces/triangles/whatever (sorry, I'm no 3D graphics expert) regarding the pads ie. the pads drillings.

"2." leads to the lack of a work-around for "3." (can't deny exporting the pads to the VRML file)

"3." creates leaky surfaces. When I convert the mesh to STEP (using the video tutorial https://www.youtube.com/watch?v=qSkWBwRJVqg ) the CAD application complains of a defective solid ("open surfaces", and when I let it show the problems it marks the drilling edges) while importing the resulting STEP file.

Thanks for reading.

Tags: pcbnew vrml
DemoFreak (demofreak-9)
tags: added: pcbnew
tags: added: vrml
Revision history for this message
jean-pierre charras (jp-charras) wrote :

1 - is fixed in rev 5289.

2 - why do you think vrml export creates leaky surfaces ?
I do not see any strange thing when loading the exported file in meshlab (which I am using sometimes), and no warning message.
(Step file is not created by Kicad)

Changed in kicad:
status: New → Incomplete
Revision history for this message
DemoFreak (demofreak-9) wrote :

Hi,

when you load the *.wrl in meshlab and switch to smoothed view, you will see some strange surface effect on the PCB. The same effect will show up when you load a VRML with reversed surface normals. As the PCB's VRML contains no normals, my guess is, that this comes from the fact that the solid isn't a closed solid but an open "assembly" of surfaces with wall thickness 0.

See attached images for illustration (two of the heatsinks has reversed surface normals, note the strange display; the same effect as shown by meshlab when viewing the PCB in smoothed view)

Secondly, when you export the VRML to STEP (via Collada) and delete all elements (footprints, pads) but the PCB itself from the resulting STEP file, you get an open solid. Seems like the drillings walls are missing. When you tell the CAD application to show you the openings in the solid it marks the drillings edges.

See attached image for illustration.

Revision history for this message
DemoFreak (demofreak-9) wrote :
Revision history for this message
DemoFreak (demofreak-9) wrote :
Revision history for this message
Cirilo Bernardo (cirilo-bernardo) wrote :

In the current exporter there was no intention to create models suitable for solid modeling.
If the holes are non-plated then they will have walls which join the 2 PCB faces; if the holes
are plated then there will be walls which join the two pad planes above and below the PCB,
but the PCB faces will not be joined at this hole. This was done to create the best visual
appearance when viewed in a VRML viewer. It should be possible to put in an option flag
so that the PCB faces are always joined at the holes; in such a case the rendering of any
2D objects such as the traces and silkscreen should be suppressed.

The exported VRML board contains no normals since the KiCad VRML code did not make
use of supplied normals at the time this code was written.

Revision history for this message
DemoFreak (demofreak-9) wrote :

Ok. Thanks for the explanation. :)

So, the bug could be closed or changed to a feature request "Make the VRML export of copper/silk optional".
Shall I open such a feature request and you close the bug here?

/Hannes

Revision history for this message
Cirilo Bernardo (cirilo-bernardo) wrote : Re: [Bug 1393277] Re: R5263: pcbnew: VRML export creates defective solids

On Tue, Nov 18, 2014 at 5:50 PM, DemoFreak <email address hidden>
wrote:

> Ok. Thanks for the explanation. :)
>
> So, the bug could be closed or changed to a feature request "Make the VRML
> export of copper/silk optional".
> Shall I open such a feature request and you close the bug here?
>
> /Hannes
>
>
If you can close the bug and subscribe me to the feature request that would
be good.

- Cirilo

Revision history for this message
DemoFreak (demofreak-9) wrote :

Created a feature request instead
https://bugs.launchpad.net/kicad/+bug/1393941

Changed in kicad:
status: Incomplete → Invalid
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