KVM IPI Virtualization support for SPR

[Paul Lai]

IPI virtualization targets to make the processor emulate the write to APIC registers that would send IPIs in virtualized system.
VMX provide new VM-execution control and VMCS field to support IPI virtualization which can eliminate APIC-Write VM-exit.
The processor sets the bit corresponding to the vector in target vCPU's PIR and may send a notification (IPI) specified by NDST
and NV fields in target vCPU's PID. It is similar to what IOMMU engine does when dealing with posted interrupt from devices.

IPI Virtualization is approved in SPR/EGS CCB and it is supposed to be enabled in C-step or later (perhaps D-step).

Platform: Xeon Sapphire Rapids

Linux 5.20
Commit info in linux/master branch:
d588bb9be1da KVM: VMX: enable IPI virtualization
753dcf7a8686 kvm: selftests: Add KVM_CAP_MAX_VCPU_ID cap test
35875316384b KVM: x86: Allow userspace to set maximum VCPU id for VM
1d5e740d518e KVM: Move kvm_arch_vcpu_precreate() under kvm->lock
f08a06c9a357 KVM: VMX: Clean up vmx_refresh_apicv_exec_ctrl()
5413bcba7ed5 KVM: x86: Add support for vICR APIC-write VM-Exits in x2APIC mode
0b85baa5f46d KVM: VMX: Report tertiary_exec_control field in dump_vmcs()
1ad4e5438c67 KVM: VMX: Detect Tertiary VM-Execution control when setup VMCS config
ed3905ba6038 KVM: VMX: Extend BUILD_CONTROLS_SHADOW macro to support 64-bit variation
465932db25f3 x86/cpu: Add new VMX feature, Tertiary VM-Execution control

[Paul Lai (pclai)]

qemu 7.2
19e2a9fb9da target/i386: Set maximum APIC ID to KVM prior to vCPU creation