Example bus schematic page
Bug #698834 reported by
nobody
This bug report is a duplicate of:
Bug #698829: Enhancement: Hierarchical Bus handling and netlisting.
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This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
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gEDA |
New
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Wishlist
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Unassigned |
Bug Description
From Dan Deisz (<email address hidden>)
Attached is an example schematic page with lots of busses on it. Exploding all these busses would result in the next level up being unreadable and not as helpful to understand. We need gschem to handle busses like this (hierarchically) and gnetlist to verilog. Hopefully, this example helps clarify what we need.
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