Activity log for bug #851258

Date Who What changed Old value New value Message
2011-09-15 20:06:17 Ramana Radhakrishnan bug added bug
2011-09-16 02:10:34 Michael Hope tags size speed task
2011-12-09 11:19:45 Simon Hosie bug added subscriber Simon Hosie
2012-05-23 09:40:13 Andrew Stubbs description Consider the following testcase. ypedef unsigned int uint32_t; typedef unsigned long long uint64_t; typedef unsigned long uintptr_t; typedef unsigned short uint16_t; void f2(char *d, char const *s, int flags) { uint32_t tmp0, tmp1; if (flags & 1) tmp0 = *s++; if (flags & 2) { uint16_t *ss = (void *)s; tmp1 = *ss++; s = (void *)ss; } if (flags & 1) *d++ = tmp0; if (flags & 2) { uint16_t *dd = (void *)d; *dd++ = tmp1; d = (void *)dd; } } GCC currently generates push {r4, r5} ands r5, r2, #1 it ne ldrbne r4, [r1], #1 @ zero_extendqisi2 ands r2, r2, #2 it ne ldrhne r3, [r1, #0] cbz r5, .L4 strb r4, [r0], #1 .L4: cbz r2, .L1 strh r3, [r0, #0] @ movhi .L1: pop {r4, r5} bx lr This could very well instead be : tst r2, #1 it ne ldrneb ip, [r1], #1 @ zero_extendqisi2 tst r2, #2 it ne ldrneh r3, [r1, #0] tst r2, #1 it ne strneb ip, [r0], #1 tst r2, #2 strneh r3, [r0, #0] @ movhi bx lr This is also a problem on other ports given that the a & b tst operation is CSE'd and the result is compared against 0. cheers Ramana Consider the following testcase. typedef unsigned int uint32_t; typedef unsigned long long uint64_t; typedef unsigned long uintptr_t; typedef unsigned short uint16_t; void f2(char *d, char const *s, int flags) {   uint32_t tmp0, tmp1;   if (flags & 1)     tmp0 = *s++;   if (flags & 2)     {       uint16_t *ss = (void *)s;       tmp1 = *ss++;       s = (void *)ss;     }   if (flags & 1)     *d++ = tmp0;   if (flags & 2)     {       uint16_t *dd = (void *)d;       *dd++ = tmp1;       d = (void *)dd;     } } GCC currently generates  push {r4, r5}  ands r5, r2, #1  it ne  ldrbne r4, [r1], #1 @ zero_extendqisi2  ands r2, r2, #2  it ne  ldrhne r3, [r1, #0]  cbz r5, .L4  strb r4, [r0], #1 .L4:  cbz r2, .L1  strh r3, [r0, #0] @ movhi .L1:  pop {r4, r5}  bx lr This could very well instead be :  tst r2, #1         it ne  ldrneb ip, [r1], #1 @ zero_extendqisi2  tst r2, #2         it ne  ldrneh r3, [r1, #0]  tst r2, #1         it ne  strneb ip, [r0], #1  tst r2, #2  strneh r3, [r0, #0] @ movhi  bx lr This is also a problem on other ports given that the a & b tst operation is CSE'd and the result is compared against 0. cheers Ramana
2012-05-30 08:13:05 Andrew Stubbs gcc-linaro: status New Triaged
2012-05-31 10:01:53 Ulrich Weigand gcc-linaro: importance Undecided Low
2014-08-25 10:53:48 Kugan Vivekanandarajah bug watch added https://bugs.linaro.org/show_bug.cgi?id=413