| 2021-10-28 14:38:43 |
Kristof Havasi |
description |
I would like to update from the old linaro v6.5-latest GCC to the current 10.3 ARM-GCC (arm-linux-none-gnueabihf).
If I compile the following program:
#include <map>
#include <iostream>
using namespace std;
int main() {
const map<const char*,int> m = {
{"foo",1},
{"bar",2},
};
for (const auto &[s, i] : m) {
cout << s << " " << i << '\n';
}
return 0;
}
// arm-linux-none-gnueabihf-g++ -static -mfpu=vfpv3-d16 -mcpu=cortex-a5+nosimd -mtune=cortex-a5 -std=gnu++17 main.c
The generated code has a VLD instruction, which triggers a SIGILL on the target (SAMA5D3 based board, Cortex-A5). From the datasheet:
The Floating-Point Unit (FPU) supports the ARMv7 VFPv4-D16 architecture without Advanced SIMD extensions (NEON).
I couldn't find any (combination of) options of mtune mcpu march mfpu, with which I could compile a program without the illegal instruction in it.
I have seen that between v6.5 and v10.x the defaults during compiler compilation were changed to --with-fpu=neon.
But based on the GCC-ARM option documentation, I would expect that -mcpu=cortex-a5+nosimd turns off SIMD instructions.
From https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
For example, ‘cortex-a9’ can be found in three major configurations: integer only, with just a floating-point unit or with floating-point and Advanced SIMD. The default is to enable all the instructions, but the extensions ‘+nosimd’ and ‘+nofp’ can be used to disable just the SIMD or both the SIMD and floating-point instructions respectively.
If I overlooked something, also thanks for pointing that out. |
I would like to update from the old linaro v6.5-latest GCC to the current 10.3 ARM-GCC (arm-linux-none-gnueabihf).
https://releases.linaro.org/components/toolchain/binaries/latest-6/arm-linux-gnueabihf/
https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads
If I compile the following program:
#include <map>
#include <iostream>
using namespace std;
int main() {
const map<const char*,int> m = {
{"foo",1},
{"bar",2},
};
for (const auto &[s, i] : m) {
cout << s << " " << i << '\n';
}
return 0;
}
// arm-linux-none-gnueabihf-g++ -static -mfpu=vfpv3-d16 -mcpu=cortex-a5+nosimd -mtune=cortex-a5 -std=gnu++17 main.c
The generated code has a VLD instruction, which triggers a SIGILL on the target (SAMA5D3 based board, Cortex-A5). From the datasheet:
The Floating-Point Unit (FPU) supports the ARMv7 VFPv4-D16 architecture without Advanced SIMD extensions (NEON).
I analyzed this by loading the coredump into gdb-multiarch and switching to asm layout:
0x98060 <memcpy+32> vld1.8 {d0}, [r1]!
I couldn't find any (combination of) options of mtune, mcpu, march, and, mfpu, with which I could compile a program without the illegal instruction in it.
I have seen that between v6.5 and v10.x the defaults during compiler compilation were changed to --with-fpu=neon.
But based on the GCC-ARM option documentation, I would expect that -mcpu=cortex-a5+nosimd turns off SIMD instructions.
From https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
For example, ‘cortex-a9’ can be found in three major configurations: integer only, with just a floating-point unit or with floating-point and Advanced SIMD. The default is to enable all the instructions, but the extensions ‘+nosimd’ and ‘+nofp’ can be used to disable just the SIMD or both the SIMD and floating-point instructions respectively.
If I overlooked something, also thanks for pointing that out. |
|
| 2021-10-28 15:24:19 |
Kristof Havasi |
description |
I would like to update from the old linaro v6.5-latest GCC to the current 10.3 ARM-GCC (arm-linux-none-gnueabihf).
https://releases.linaro.org/components/toolchain/binaries/latest-6/arm-linux-gnueabihf/
https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads
If I compile the following program:
#include <map>
#include <iostream>
using namespace std;
int main() {
const map<const char*,int> m = {
{"foo",1},
{"bar",2},
};
for (const auto &[s, i] : m) {
cout << s << " " << i << '\n';
}
return 0;
}
// arm-linux-none-gnueabihf-g++ -static -mfpu=vfpv3-d16 -mcpu=cortex-a5+nosimd -mtune=cortex-a5 -std=gnu++17 main.c
The generated code has a VLD instruction, which triggers a SIGILL on the target (SAMA5D3 based board, Cortex-A5). From the datasheet:
The Floating-Point Unit (FPU) supports the ARMv7 VFPv4-D16 architecture without Advanced SIMD extensions (NEON).
I analyzed this by loading the coredump into gdb-multiarch and switching to asm layout:
0x98060 <memcpy+32> vld1.8 {d0}, [r1]!
I couldn't find any (combination of) options of mtune, mcpu, march, and, mfpu, with which I could compile a program without the illegal instruction in it.
I have seen that between v6.5 and v10.x the defaults during compiler compilation were changed to --with-fpu=neon.
But based on the GCC-ARM option documentation, I would expect that -mcpu=cortex-a5+nosimd turns off SIMD instructions.
From https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
For example, ‘cortex-a9’ can be found in three major configurations: integer only, with just a floating-point unit or with floating-point and Advanced SIMD. The default is to enable all the instructions, but the extensions ‘+nosimd’ and ‘+nofp’ can be used to disable just the SIMD or both the SIMD and floating-point instructions respectively.
If I overlooked something, also thanks for pointing that out. |
I would like to update from the old linaro v6.5-latest GCC to the current 10.3 ARM-GCC (arm-linux-none-gnueabihf).
https://releases.linaro.org/components/toolchain/binaries/latest-6/arm-linux-gnueabihf/
https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads
If I compile the following program:
#include <map>
#include <iostream>
using namespace std;
int main() {
const map<const char*,int> m = {
{"foo",1},
{"bar",2},
};
for (const auto &[s, i] : m) {
cout << s << " " << i << '\n';
}
return 0;
}
// arm-linux-none-gnueabihf-g++ -static -mfpu=vfpv3-d16 -mcpu=cortex-a5+nosimd -mtune=cortex-a5 -std=gnu++17 main.c
The generated code has a VLD instruction, which triggers a SIGILL on the target (SAMA5D3 based board, Cortex-A5). From the datasheet:
The Floating-Point Unit (FPU) supports the ARMv7 VFPv4-D16 architecture without Advanced SIMD extensions (NEON).
I analyzed this by loading the coredump into gdb-multiarch and switching to asm layout:
#0 0x00098060 in memcpy () at ../sysdeps/arm/armv7/multiarch/memcpy_impl.S:293
293 ../sysdeps/arm/armv7/multiarch/memcpy_impl.S: No such file or directory.
layout asm
0x98060 <memcpy+32> vld1.8 {d0}, [r1]!
I couldn't find any (combination of) options of mtune, mcpu, march, and, mfpu, with which I could compile a program without the illegal instruction in it.
I have seen that between v6.5 and v10.x the defaults during compiler compilation were changed to --with-fpu=neon.
But based on the GCC-ARM option documentation, I would expect that -mcpu=cortex-a5+nosimd turns off SIMD instructions.
From https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
For example, ‘cortex-a9’ can be found in three major configurations: integer only, with just a floating-point unit or with floating-point and Advanced SIMD. The default is to enable all the instructions, but the extensions ‘+nosimd’ and ‘+nofp’ can be used to disable just the SIMD or both the SIMD and floating-point instructions respectively.
If I overlooked something, also thanks for pointing that out, but with the bootlin 10.2 toolchain and the same compiler options it works
https://toolchains.bootlin.com/releases_armv7-eabihf.html |
|
