"The LDR pseudo-instruction never generates a 16-bit flag-setting MOV instruction."
However, when I use the following:
LDR R0,=1
it gets replaced by:
MOVS R0,1 // This is a 16-bit instruction that updates flags N and Z.
which modifies the flags (and I believe, should not). To comply with the ARM documentation, it should replace the pseudo-instruction with one of the following that do not modify the flags:
MOV.W R0,1 // Both of these are 32-bit instructions, but
MOVW R0,1 // neither of them affect the flags.
FYI, I use the EmBitz v1.11 IDE which uses gcc 5_4- embedded branch,
and the only assembler directives I use are:
According to the ARM documentation at
http:// infocenter. arm.com/ help/index. jsp?topic= /com.arm. doc.dui0489i/ Babbfdih. html
under the heading "LDR in Thumb code", it says:
"The LDR pseudo-instruction never generates a 16-bit flag-setting MOV instruction."
However, when I use the following:
LDR R0,=1
it gets replaced by:
MOVS R0,1 // This is a 16-bit instruction that updates flags N and Z.
which modifies the flags (and I believe, should not). To comply with the ARM documentation, it should replace the pseudo-instruction with one of the following that do not modify the flags:
MOV.W R0,1 // Both of these are 32-bit instructions, but
MOVW R0,1 // neither of them affect the flags.
FYI, I use the EmBitz v1.11 IDE which uses gcc 5_4- embedded branch,
and the only assembler directives I use are:
.syntax unified
.cpu cortex-m4
.text
.thumb_func
.align 2