Cortex-M3 ldr r8, =#20 generates cmp r0, #20 instruction
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
GNU Arm Embedded Toolchain |
New
|
Undecided
|
Unassigned |
Bug Description
Hi
I am working on writing assembly for a Cortex-M3 chip, and I just came across something interesting. When I try to compile `ldr r8, = #20` the assembler generates `cmp r0, #20` instruction. This happens for all the high registers. I don't know if this is an intended behavior or not, but it doesn't happen for higher numbers (> 255) and mov instruction. For example:
ldr r8, = #1245 - works fine
mov r8, #20 - works fine
ldr r8, = #20 - do not work.
I use the following to compile.
arm-none-
Here is the part of the code:
.thumb
.syntax unified
...
_start:
ldr r5, = #1234
ldr r4, = #1234
ldr r8, = #20
mov r8, #20
ldr r3, = #1000
Here is what it generates:
00000008 <_start>:
8: f240 45d2 movw r5, #1234 ; 0x4d2
c: f240 44d2 movw r4, #1234 ; 0x4d2
10: 2814 cmp r0, #20
12: f04f 0814 mov.w r8, #20
16: f44f 737a mov.w r3, #1000 ; 0x3e8
Can you please advise?
Thanks,
Furkan