ARM: CORTEX M, PRIMASK does not disable interrupts

[Oleksiy Bondarenko]

qemu version 0.15.1
but the same code is in qemu 1.0

"CPSID I" does not disable interrupts for CORTEX M3

if (interrupt_request & CPU_INTERRUPT_HARD
                        && ((IS_M(env) && env->regs[15] < 0xfffffff0)
                            || !(env->uncached_cpsr & CPSR_I))) {
                        env->exception_index = EXCP_IRQ;
                        do_interrupt(env);
                        next_tb = 0;
                    }

do_interrupt() will be executed even if (env->uncached_cpsr & CPSR_I) == 1 , disable interrupt bit set.

then changed to:

if (interrupt_request & CPU_INTERRUPT_HARD
                        && !(env->uncached_cpsr & CPSR_I)
                        && (IS_M(env) ? env->regs[15] < 0xfffffff0: 1) ) {
                        env->exception_index = EXCP_IRQ;
                        do_interrupt(env);
                        next_tb = 0;
                    }

works

[Peter Maydell (pmaydell)]

This change changes the behaviour for non-M-profile cores, which looks wrong.

See discussion in this mailing list thread where a similar patch was suggested:
 http://lists.gnu.org/archive/html/qemu-devel/2011-06/msg00500.html

M profile interrupt handling is known-broken. I'm not accepting any patches in this area unless they come attached to a decent explanation of why they are the correct change to make and show some evidence of the whole problem having been considered.

[Peter Maydell (pmaydell)]

> This change changes the behaviour for non-M-profile cores

...or maybe not: I was confused by the resemblance to that other patch. I still think one-line fixes are unlikely to be the right approach here, though.

[Peter Maydell (pmaydell)]

This long-standing bug has been fixed by the rewrite of the M-profile exception handling for QEMU 2.9.