Circuits OR gate broken
Bug #925201 reported by
rplantz
This bug affects 1 person
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
dvisvgm |
Fix Released
|
Medium
|
Martin Gieseking |
Bug Description
I'm using circuit_macros v7.1 by J. D. Aplevich to create latex drawings. Using dvips creates a proper drawing, but dvisvgm messes up the OR gate. This system only allows one file attachment, so I have provided the svg.
Changed in dvisvgm: | |
importance: | Undecided → Medium |
milestone: | none → 1.0.11 |
assignee: | nobody → Martin Gieseking (martin-gieseking) |
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The file jk_circuit.svg was added: OR gate is messed up.